Datasheet

SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
32
8.5 Power Management Controller
 Provides:
 the Processor Clock PCK
 the Master Clock MCK, in particular to the Matrix and the memory interfaces
 the USB Device Clock UDPCK
 the USB Host Clock UHPCK
 independent peripheral clocks, typically at the frequency of MCK
 four programmable clock outputs: PCK0 to PCK3
 Five flexible operating modes:
 Normal Mode with processor and peripherals running at a programmable frequency
 Idle Mode with processor stopped while waiting for an interrupt
 Slow Clock Mode with processor and peripherals running at low frequency
 Standby Mode, mix of Idle and Backup Mode, with peripherals running at low frequency, processor
stopped waiting for an interrupt
 Backup Mode with Main Power Supplies off, VDDBU powered by a battery
Figure 8-3. SAM9263 Power Management Controller Block Diagram
8.6 Periodic Interval Timer
See PIT Section 15.2 “Embedded Characteristics”.
8.7 Watchdog Timer
See WDT Section 16.2 “Embedded Characteristics”.
8.8 Real-time Timer
 Two Real-time Timers, allowing backup of time with different accuracies (See RTT Section 14.2 “Embedded
Characteristics”.)
MCK
periph_clk[..]
int
SLCK
MAINCK
PLLACK
Prescaler
/1,/2,/4,...,/64
PCK
Processor
Clock
Controller
Idle Mode
Master Clock Controller
Peripherals
Clock Controller
ON/OFF
USB Clock Controller
SLCK
MAINCK
PLLACK
Prescaler
/1,/2,/4,...,/64
Programmable Clock Controller
PLLBCK
Divider
/1,/2,/4
pck[..]
PLLBCK
PLLBCK
UDPCK
Divider
/1,/2,/4
ON/OFF
UHPCK
ON/OFF