Datasheet

313
SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
24.4.19 Single Destination Transaction Request Register
Name: DMAC_SglReqDstReg
Address: 0x00800380
Access: Read/Write
A bit is assigned for each channel in this register. DMAC_SglReqDstReg[n] is ignored when software handshaking is not
enabled for the source of channel n.
A channel D_SG_REQ bit is written only if the corresponding channel write enable bit in the REQ_WE field is asserted on
the same AMBA write transfer.
• D_SG_REQx: Destination Single Request
• REQ_WEx: Request Write Enable
0: Write disabled
1: Write enabled
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
––––––REQ_WE1REQ_WE0
76543210
––––––D_SG_REQ1D_SG_REQ0