Datasheet

SAM9263 [DATASHEET]

Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16

274

Figure 24-8. DMA Transfer Flow for Source and Destination Linked List Address

Channel enabled by

software

LLI Fetch

Hardware reprograms

SARx, DARx, CTLx, LLPx

DMAC block transfer

Source/destination

status fetch

Is DMAC in

Row1 of

DMAC State Machine Table?

Channel Disabled by

hardware

Block Complete interrupt

generated here

DMAC transfer Complete

interrupt generated here

yes