Datasheet

261
SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
24. DMA Controller (DMAC)
24.1 Overview
The DMA Controller (DMAC) is an AHB-central DMA controller core that transfers data from a source peripheral to
a destination peripheral over one or more AMBA buses. One channel is required for each source/destination pair.
In the most basic configuration, the DMAC has one master interface and one channel. The master interface reads
the data from a source and writes it to a destination. Two AMBA transfers are required for each DMA data transfer.
This is also known as a dual-access transfer.
The DMAC is programmed via the AHB slave interface.
24.2 Block Diagram
Figure 24-1. DMA Controller (DMAC) Block Diagram
AHB Slave
Interface
CFG
AHB Slave
DMA Controller
SRC
FSM
DST
FSM
FIFO
AHB Master
Interface
AHB Master
Hardware
Handshaking
Interface
Interrupt
Generator
irq_dma
Channel 0
Channel 1
DMARQ0..3