Datasheet

SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
238
22.5.5.3 Deep Power-down Mode
This mode is selected by programming the LPCB field to 3 in the SDRAMC Low Power Register. When this mode
is activated, all internal voltage generators inside the SDRAM are stopped and all data is lost.
When this mode is enabled, the application must not access to the SDRAM until a new initialization sequence is
done (See “SDRAM Device Initialization” on page 230).
This is described in Figure 22-8.
Figure 22-8. Deep Power-down Mode Behavior
SDCK
SDCS
RAS
CAS
SDRAMC_A[12:0]
D[31:0]
(input)
t
RP
= 3
SDWE
Dnb
Dnc
Dnd
col c col d
Row n
CKE