Datasheet

223
SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
21.14.2 SMC Pulse Register
Name: SMC_PULSE[0..7]
Address: 0xFFFFE404 (0)[0], 0xFFFFE414 (0)[1], 0xFFFFE424 (0)[2], 0xFFFFE434 (0)[3], 0xFFFFE444 (0)[4],
0xFFFFE454 (0)[5], 0xFFFFE464 (0)[6], 0xFFFFE474 (0)[7], 0xFFFFEA04 (1)[0], 0xFFFFEA14 (1)[1],
0xFFFFEA24 (1)[2], 0xFFFFEA34 (1)[3], 0xFFFFEA44 (1)[4], 0xFFFFEA54 (1)[5], 0xFFFFEA64 (1)[6],
0xFFFFEA74 (1)[7]
Access: Read/Write
• NWE_PULSE: NWE Pulse Length
The NWE signal pulse length is defined as:
NWE pulse length = (256* NWE_PULSE[6] + NWE_PULSE[5:0]) clock cycles
The NWE pulse length must be at least 1 clock cycle.
• NCS_WR_PULSE: NCS Pulse Length in WRITE Access
In write access, the NCS signal pulse length is defined as:
NCS pulse length = (256* NCS_WR_PULSE[6] + NCS_WR_PULSE[5:0]) clock cycles
The NCS pulse length must be at least 1 clock cycle.
• NRD_PULSE: NRD Pulse Length
In standard read access, the NRD signal pulse length is defined in clock cycles as:
NRD pulse length = (256* NRD_PULSE[6] + NRD_PULSE[5:0]) clock cycles
The NRD pulse length must be at least 1 clock cycle.
In page mode read access, the NRD_PULSE parameter defines the duration of the subsequent accesses in the page.
• NCS_RD_PULSE: NCS Pulse Length in READ Access
In standard read access, the NCS signal pulse length is defined as:
NCS pulse length = (256* NCS_RD_PULSE[6] + NCS_RD_PULSE[5:0]) clock cycles
The NCS pulse length must be at least 1 clock cycle.
In page mode read access, the NCS_RD_PULSE parameter defines the duration of the first access to one page.
31 30 29 28 27 26 25 24
– NCS_RD_PULSE
23 22 21 20 19 18 17 16
– NRD_PULSE
15 14 13 12 11 10 9 8
– NCS_WR_PULSE
76543210
–NWE_PULSE