Datasheet

SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
204
Figure 21-18. Early Read Wait State: NCS Controlled Write with No Hold Followed by a Read with No NCS Setup
Figure 21-19. Early Read Wait State: NWE-controlled Write with No Hold Followed by a Read with one Set-up Cycle
write cycle
(WRITE_MODE = 0)
Early Read
wait state
MCK
NRD
NCS
read cycle
(READ_MODE = 0 or READ_MODE = 1)
no setup
no hold
D[31:0]
NBS0, NBS1,
NBS2, NBS3,
A0,A1
A[25:2]
A [25:2]
NBS0, NBS1,
NBS2, NBS3,
A0, A1
write cycle
(WRITE_MODE = 1)
Early Read
wait state
MCK
NRD
internal write controlling signal
external write controlling signal
(NWE)
D[31:0]
read cycle
(READ_MODE = 0 or READ_MODE = 1)
no hold
read setup = 1