Datasheet

17
SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
5. I/O Line Considerations
5.1 JTAG Port Pins
TMS, TDI and TCK are Schmitt trigger inputs and have no pull-up resistors.
TDO and RTCK are outputs, driven at up to VDDIOP0, and have no pull-up resistors.
The JTAGSEL pin is used to select the JTAG boundary scan when asserted at a high level (VDDBU). It integrates
a permanent pull-down resistor of about 15 kΩ to GNDBU, so that it can be left unconnected for normal operations.
The NTRST signal is described in Section 5.3.
All JTAG signals except JTAGSEL (VDDBU) are supplied with VDDIOP0.
5.2 Test Pin
The TST pin is used for manufacturing test purposes when asserted high. It integrates a permanent pull-down
resistor of about 15 kΩ to GNDBU, so that it can be left unconnected for normal operations. Driving this line at a
high level leads to unpredictable results.
This pin is supplied with VDDBU.
5.3 Reset Pins
NRST is an open-drain output integrating a non-programmable pull-up resistor. It can be driven with voltage at up
to VDDIOP0.
NTRST is an input which allows reset of the JTAG Test Access port. It has no action on the processor.
As the product integrates power-on reset cells, which manage the processor and the JTAG reset, the NRST and
NTRST pins can be left unconnected.
The NRST and NTRST pins both integrate a permanent pull-up resistor of 100 kΩ minimum to VDDIOP0.
The NRST signal is inserted in the Boundary Scan.
5.4 PIO Controllers
All the I/O lines managed by the PIO Controllers integrate a programmable pull-up resistor of 100 kΩ typical.
Programming of this pull-up resistor is performed independently for each I/O line through the PIO Controllers.
After reset, all the I/O lines default as inputs with pull-up resistors enabled, except those which are multiplexed with
the External Bus Interface signals that require to be enabled as Peripheral at reset. This is explicitly indicated in
the column “Reset State” of the PIO Controller multiplexing tables on page 39 and following.
5.5 Shutdown Logic Pins
The SHDN pin is a tri-state output only pin, which is driven by the Shutdown Controller. There is no internal pull-up.
An external pull-up to VDDBU is needed and its value must be higher than 1 MΩ. The resistor value is calculated
according to the regulator enable implementation and the SHDN level.
The pin WKUP is an input-only. It can accept voltages only between 0V and VDDBU.