Datasheet

SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
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4.2.2 Power-down Sequence
Switch off the VDDIOMx and VDDIOPx power supply prior to or at the same time as VDDCORE.
No power-up or power-down restrictions apply to other power supplies.
4.3 Programmable I/O Lines Power Supplies
The power supply pins VDDIOM0 and VDDIOM1 accept two voltage ranges. This allows the device to reach its
maximum speed, either out of 1.8V or 3.0V external memories.
The maximum speed is 100 MHz on the pin SDCK (SDRAM Clock) loaded with 10 pF. The other signals (control,
address and data signals) do not go over 50 MHz, loaded with 30 pF for power supply at 1.8V and 50 pF for power
supply at 3.3V.
The voltage ranges are determined by programming registers in the Chip Configuration registers located in the
Bus Matrix User Interface.
At reset, the selected voltage defaults to 3.3V nominal and power supply pins can accept either 1.8V or 3.3V.
However, the device cannot reach its maximum speed if the voltage supplied to the pins is only 1.8V without
reprogramming the EBI0 voltage range. The user must be sure to program the EBI0 voltage range before getting
the device out of its Slow Clock Mode.