Datasheet

141
SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
17. Shutdown Controller (SHDWC)
17.1 Description
The Shutdown Controller controls the power supplies VDDIO and VDDCORE and the wake-up detection on
debounced input lines.
17.2 Embedded Characteristics
 Shutdown and Wake-up logic
 Software programmable assertion of the SHDN pin
 Deassertion Programmable on a WKUP pin level change or on alarm
17.3 Block Diagram
Figure 17-1. Shutdown Controller Block Diagram
17.4 I/O Lines Description
17.5 Product Dependencies
17.5.1 Power Management
The Shutdown Controller is continuously clocked by Slow Clock. The Power Management Controller has no effect
on the behavior of the Shutdown Controller.
Shutdown
Wake-up
Shutdown
Output
Controller
SHDN
WKUP0
SHDW
WKMODE0
Shutdown Controller
RTT Alarm
RTTWKEN
SHDW_MR
SHDW_MR
SHDW_CR
CPTWK0
WAKEUP0
RTTWK
SHDW_SR
SHDW_SR
set
set
reset
reset
read SHDW_SR
read SHDW_SR
SLCK
Table 17-1. I/O Lines Description
Name Description Type
WKUP0 Wake-up 0 input Input
SHDN Shutdown output Output