Datasheet
1067
SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
50.1.18.4 STOP not Generated
If the sequence described as follows occurs:
1. WRITE 1 or more bytes at a given address.
2. Send a STOP.
3. Wait for TXCOMP flag.
4. READ (or WRITE) 1 or more bytes at the same address.
The STOP is not generated.
The line shows: DADR BYTE 1, ..., BYTE n, NO STOP generated, BYTE 1, ..., BYTE n.
Problem Fix/Workaround
Insert a delay of one TWI clock period before step 4.
50.1.19 UDP
50.1.19.1 Bad Data in the First IN Data Stage
All or part of the data of the first IN data Stage are not transmitted. It may then be a Zero Length Packet. The CRC
is correct. Thus the HOST may only see that the size of the received data does not match the requested length.
But even if performed again, the control transfer probably fails.
Problem Fix/Workaround
Control transfers are mainly used at device configuration. After clearing RXSETUP, the software needs to compute
the setup transaction request before writing data into the FIFO if needed. This time is generally greater than the
minimum safe delay required above. If not, a software wait loop after RXSETUP clear may be added at minimum
cost.
50.1.20 UHP
50.1.20.1 Non-ISO IN Transfers
Conditions:
Consider the following scenario:
1. The Host controller issues an IN token.
2. The Device provides the IN data in a short packet.
3. The Host controller writes the received data to the system memory.
4. The Host controller is now supposed to do two Write transactions (TD status write and TD retirement write)
to the system memory in order to complete the status update.
5. Host controller raises the request for the first write transaction. By the time the transaction is completed, a
frame boundary is crossed.
6. After completing the first write transaction, the Host controller skips the second write transaction.
Consequence: When this error occurs, the Host controller tries the same IN token again.
Problem Fix/Workaround
This problem can be avoided if the system guarantees that the status update can be completed within the same
frame.