Datasheet

1049
SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
46.11.2 ISI
Figure 46-14. ISI Timing Diagram
SPI
4
MISO Hold time after SPCK falls (master) -t
CPMCK
/2 -4.3 ns
SPI
5
SPCK falling to MOSI Delay (master) 0.4 ns
SPI
6
SPCK falling to MISO Delay (slave) 9.6 ns
SPI
7
MOSI Setup time before SPCK rises (slave) 3.5 ns
SPI
8
MOSI Hold time after SPCK rises (slave) -0.6 ns
SPI
9
SPCK rising to MISO Delay (slave) 9.6 ns
SPI
10
MOSI Setup time before SPCK falls (slave) 3.4 ns
SPI
11
MOSI Hold time after SPCK falls (slave) -0.5 ns
Table 46-36. SPI Timings (Continued)
Symbol Parameter Conditions Min Max Unit
Table 46-37. ISI Timings with Peripheral Supply 1.8V
Symbol Parameter Min Max Unit
ISI
1
DATA/VSYNC/HSYNC setup time 0 ns
ISI
2
DATA/VSYNC/HSYNC hold time 4.56 ns
ISI
3
PIXCLK frequency 64.4 MHz
Table 46-38. ISI Timings with Peripheral Supply 2.5V
Symbol Parameter Min Max Unit
ISI
1
DATA/VSYNC/HSYNC setup time 0 ns
ISI
2
DATA/VSYNC/HSYNC hold time 4.14 ns
ISI
3
PIXCLK frequency 69.8 MHz
Table 46-39. ISI Timings with Peripheral Supply 3.3V
Symbol Parameter Min Max Unit
ISI
1
DATA/VSYNC/HSYNC setup time 0 ns
ISI
2
DATA/VSYNC/HSYNC hold time 3.96 ns
ISI
3
PIXCLK frequency 74.8 MHz
PIXCLK
DATA[7:0]
VSYNC
HSYNC
Valid Data
Valid Data Valid Data
ISI
1
ISI
2
ISI
3