Datasheet

SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
1048
Figure 46-11. SPI Master Mode with (CPOL = NCPHA = 0) or (CPOL = NCPHA = 1)
Figure 46-12. SPI Slave Mode 0 and 3
Figure 46-13. SPI Slave Mode 1 and 2
Table 46-36. SPI Timings
Symbol Parameter Conditions Min Max Unit
SPI
0
MISO Setup time before SPCK rises (master) t
CPMCK
/2 +10.3 ns
SPI
1
MISO Hold time after SPCK rises (master) -t
CPMCK
/2 -3.5 ns
SPI
2
SPCK rising to MOSI Delay (master) 1.0 ns
SPI
3
MISO Setup time before SPCK falls (master) t
CPMCK
/2 +10.9 ns
SPCK
MISO
MOSI
SPI
5
SPI
3
SPI
4
SPCK
MISO
MOSI
SPI
6
SPI
7
SPI
8
SPCK
MISO
MOSI
SPI
9
SPI
10
SPI
11