Datasheet

SAM9263 [DATASHEET]
Atmel-6249N-ATARM-SAM9263-Datasheet_14-Mar-16
1032
46.6.5 PLL Characteristics
Note: 1. Startup time depends on PLLA RC filter. A calculation tool is provided by Atmel.
Note: 1. Startup time depends on PLLB RC filter. A calculation tool is provided by Atmel.
46.7 I/Os
Criteria used to define the maximum frequency of the I/Os:
 Output duty cycle (40%–60%)
 Minimum output swing: 100 mV to VDDIO - 100 mV
 Addition of rising and falling time inferior to 75% of the period
Notes: 1. 3.3V domain: V
DDIOP
3.0–3.6 V, maximum external capacitor = 40 pF
2. 2.5V domain: V
DDIOP
2.3–2.7 V, maximum external capacitor = 30 pF
3. 1.8V domain: V
DDIOP
1.65–1.95 V, maximum external capacitor = 20 pF
Table 46-13. PLLA Characteristics
Symbol Parameter Conditions Min Typ Max Unit
f
OUT
Output Frequency
Field CKGR_PLLAR.OUTA is 00 80 200 MHz
Field CKGR_PLLAR.OUTA is 10 190 240 MHz
f
IN
Input Frequency 1 32 MHz
I
PLL
Current Consumption
Active mode 3 mA
Standby mode 1 µA
Table 46-14. PLLB Characteristics
Symbol Parameter Conditions Min Typ Max Unit
f
OUT
Output Frequency
Field CKGR_PLLBR.OUTB is 00 80 200 MHz
Field CKGR_PLLBR.OUTB is 10 190 240 MHz
f
IN
Input Frequency 1 32 MHz
I
PLL
Current Consumption
Active mode 3 mA
Standby mode 1 µA
Table 46-15. I/O Characteristics
Symbol Parameter Conditions Min Max Unit
f
max
VDDIOP0 powered Pins frequency 3.3V domain
(1)
100 MHz
VDDIOP1 powered Pins frequency
3.3V domain
(1)
100 MHz
2.5V domain
(2)
91 MHz
1.8V domain
(3)
66 MHz