Datasheet

81
SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
12.6 DataFlash Boot Sequence
The DataFlash boot looks for a valid application in the SPI DataFlash memory.
SPI0 is configured in mater mode to generate a SPCK at 8 MHz. Serial Flash shall be connected to NPCS0.
The DataFlash boot reads the DataFlash flash status register (Instruction code 0xD7). The DataFlash is
considered as ready if bit 7 of the returned status register is set.
If no DataFlash is connected or if it does not answer, DataFlash boot exits after 1000 attempts.
If the DataFlash is ready, DataFlash boot reads the first 8 words into SRAM (Instruction code “Continuous Read
Array” 0x0b) and checks if it corresponds to valid exception vectors according to the Valid Image detection
algorithm.
If a valid application is found, this application is loaded into internal SRAM and executed by branching at address
0x0000_0000 after remap. This application may be the application code or a second-level bootloader.
The DataFlash boot is configured to be compatible with the future design of the DataFlash.
Figure 12-7. DataFlash Download
End
Read the first 8 instructions (32 bytes).
Decode the sixth ARM vector
Ye s
Read the DataFlash into the internal SRAM.
(code size to read in vector 6)
Restore the reset value for the peripherals.
Set the PC to 0 and perform the REMAP
to jump to the downloaded application
Send status command
8 vectors
(except vector 6) are LDR
or Branch instruction
Ye s
Start
Is status OK ?
Jump to next boot
solution
No
No