Datasheet

SAM9261 [DATASHEET]

Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16

12.3 Device Initialization

Initialization follows the steps described below:

1. Stack setup for ARM supervisor mode

2. Main Oscillator Frequency Detection

3. C variable initialization

4. PLL setup: PLLB is initialized to generate a 48 MHz clock necessary to use the USB Device. A register

located in the Power Management Controller (PMC) determines the frequency of the main oscillator and

thus the correct factor for the PLLB.

Table 12-1 defines the crystals supported by the boot program.

5. Initialization of the DBGU serial port (115200 bauds, 8, N, 1)

6. Enable the user reset

7. Jump to Serial Flash Boot sequence through NPCS0. If Serial Flash Boot succeeds, perform a remap and

jump to 0x0.

8. Jump to DataFlash Boot sequence through NPCS0. If DataFlash Boot succeeds, perform a remap and jump

to 0x0.

9. Jump to NAND Flash Boot sequence. If NAND Flash Boot succeeds, perform a remap and jump to 0x0.

10. Jump to SD Card Boot sequence. If SD Card Boot succeeds, perform a remap and jump to 0x0.

11. Jump to EEPROM Boot sequence. If EEPROM Boot succeeds, perform a remap and jump to 0x0.

12. Activation of the Instruction Cache

13. Jump to SAM-BA Boot sequence

14. Disable the WatchDog

15. Initialization of the USB Device Port

Figure 12-2. Remap Action after Download Completion

Table 12-1. Crystals Supported by Software Auto-Detection (MHz)

3.0 3.2768 3.6864 3.84 4.0

4.433619 4.608 4.9152 5.0 5.24288

6.0 6.144 6.4 6.5536 7.159090

7.3728 7.864320 8.0 9.8304 10.0

11.05920 12.0 12.288 13.56 14.31818

14.7456 16.0 17.734470 18.432 20.0

REMAP

Internal

ROM

Internal

SRAM

Internal

SRAM

Internal

ROM

0x0030_0000

0x0000_0000

0x0010_0000

0x0000_0000