Datasheet
739
SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
Errata: Added:
Section “All devices are marked with the Atmel logo and the ordering code.” on page 1.
Section 42.1.3.3 “Boot ROM: Temperature Range” on page 701
Section 42.1.6.2 “MCI: Data Timeout Error Flag” on page 702
Section 42.1.6.3 “MCI: STREAM command not supported” on page 702
Section 42.1.6.4 “MCI: STOP during a WRITE_MULTIPLE_BLOCK command” on page
703 Section 42.1.10.4 “SPI: Chip Select and fixed mode” on page 706
Section 42.1.10.5 “SPI: Baud rate set to 1” on page 706
Section 42.1.10.6 “SPI: Software Reset” on page 706
Section 42.1.15.5 “TWI: Software reset” on page 709
Section 42.1.15.6 “TWI: STOP not generated” on page 709,
Section 42.2.15.2 “USART: RTS unexpected behavior” on page 703
Section 42.2.17.1 “UDP: Bad data in the first IN data stage” on page 704
Section 42.1.14.1 “SYSC: Possible event loss when reading RTT_SR” on page 708
Section 42.1.2.1 “Backup Overconsumption during AHB Masters activity” on page 700.
Removed errata: TWI: Behavior of OVRE bit andTWI: Clock Divider Limitation.
Doc. Rev.
6062C
Date
26-Jan-06 Comments
Change
Request
Reference
Corrected MIPS and speed on page 1.
Added information on EBI NCS0 when BMS = 0 in Table 8-3, “Internal Memory Mapping,”
on page 17.
2292
Removed note (3) regarding ALE and CLE signals from Table 20-4, “EBI Pins and External
Devices Connections,” on page 145.
1729
Corrected values for SMC_SETUP, SMC_PULSE, SMC_CYCLE and SMC_MODE
registers in Table 21-5, “Reset Values of Timing Parameters,” on page 181 and Table 21-9,
“SMC Register Mapping,” on page 202.
1726
Removed all references to High-speed Register in ”SDRAM Controller (SDRAMC)” section.
Corrected PRES description in Section 25.10.11 ”PMC Master Clock Register” on page
262.
1603
SPI: Updated Figure 29-9, “Slave Mode Functional Bloc Diagram,” on page 376 to remove
FLOAD.
1542
SPI: Updated information on SPI_RDR in Section 29.6.3 “Master Mode Operations” on
page 370. Added information to SWRST bit description in Section 29.7.1 “SPI Control
Register” on page 378. Corrected equations in DLYBCT bit description on page 390.
1543
SPI: Changed Section 29.6.3.8 ”Mode Fault Detection” on page 367.1676
UDP: New documentation integrated.
Errata: Added errata Section 41.5.3 ”Disabling Does not Operate Correctly” on page 654 to
Section 41.5.6 ”Clock Divider Limitation” on page 655 and Section 41.7 ”UHP” on page
655.
Doc. Rev.
6062D
Date
14-Apr-06 Comments (Continued)
Change
Request
Reference