Datasheet
SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
734
Errata:
The following have been added.
Section 42.1.3.1 “Boot ROM: Only DataFlash Boot Is Functional” rfo
Section 42.1.11.1 “SSC: Transmitter Limitations in Slave Mode”
Section 42.1.11.3 “SSC: Last RK Clock Cycle when RK Outputs a Clock During Data
Transfer”,
Section 42.1.11.4 “SSC: First RK Clock Cycle when RK Outputs a Clock During Data
Transfer”
4770
Section 42.1.9.2 “SDRAM: JEDEC Standard Compatibility” 4218
Section 42.1.9.3 “SDRAM: Mobile SDRAM Device Initialization Constraint” 4639
Section 42.2.15.3 ”USART: TXD signal is Floating in Modem and Hardware Handshaking
Mode”
Section 42.2.15.4 ”USART: DCD is Active High Instead of Low”
4719
Doc. Rev.
6062G 22-Feb-07 Comments
Change
Request
Ref
Updated Section 9.6 ”Power Management Controller” on page 25 and Figure 9-3, “Power
Management Controller Block Diagram,” on page 25.
3491
EBI: In Table 19-4, “EBI Pins and External Devices Connections,” on page 135, added Note
(3)
on CE connection and NAND Flash.
3894
BootROM: Updated DataFlash support in Table 13-2, “DataFlash Device,” on page 84. 4183
RSTC: In Section 13.4.1 “Reset Controller Overview” on page 88 added information on startup
counter for crystal oscillator.
3005
SMC: Added information on boot inSection 20.7.2.1 “Byte Write Access” on page 158. 3252
SDRAMC: Change to Step 5 in Section 21.4.1 “SDRAM Device Initialization” on page 196;
addition of note
(1)
on page 196.
3305
PMC: Updated Figure 23-1, “Typical Slow Clock Crystal Oscillator Connection,” on page 231
and Figure 23-3, “Typical Crystal Connection,” on page 232.
Updated Section 23.3.1 “Main Oscillator Connections” on page 232.
Updated information on HClocks in Section 24.1 “Overview” on page 235.
Updated information on enable/disable in Section 24.3 “Processor Clock Controller” on page
236.
3861
3832
3491
3835
PIO: Figure 28-3, “I/O Line Control Logic,” on page 329 change to I/O Line Control Logic.
Section 28.4.5 “Synchronous Data Output” on page 331, PIO_OWSR typo corrected.
Section 28.6 “Parallel Input/Output Controller (PIO) User Interface” on page 335, footnotes
updated on PIO_PSR, PIO_ODSR, PIO_PDSR in Register Mapping table.
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3289
3974
Doc. Rev.
6062H
Date
13-Nov-07 Comments (Continued)
Change
Request
Ref.