Datasheet
SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
714
For a 16-word burst, the LCD DMA Base Address must start on a 16-word offset: 0x0, 0x40, 0x80 or 0xc0.
BRSTLN = 3
For a 4-word burst, the LCD DMA Base Address offset must start on a 4-word offset: 0x0, 0x10, ..., 0xf0.
42.2.5.3 LCD: 24-bit Packed Mode
LCD DMA Base Address and LCD DMA burst size must be selected with care in 24-bit packed mode. A 32-bit
word contains some bits of a pixel and some bits of the following. If LCD DMA Base Address is not aligned with a
pixel start, the colors will be modified.
Respect "LCD periodic bad pixels" erratum constrains lead to select the LCD DMA Base Address regarding the
LCD DMA burst size.
Problem Fix/Workaround
LCD DMA Base Address is to be set on a pixel start, every three 32-bit word.
The offset of the LCD DMA Base Address must be a multiple of 0x30 plus 0x0, 0xc, 0x18 or 0x24. (0x0, 0xc, 0x18,
0x24, 0x30, 0x3c, 0x48, 0x54, 0x60,0x6c, 0x78, 0x84, 0x90, 0x9c, 0xa8, 0xb4, 0xc0 ...)
e.g. regarding the bursts size:
1. BRSTLN = 3 implies the following LCD DMA Base Address offsets: 0x0, 0x30, 0x60, ...
2. BRSTLN = 15 implies the following LCD DMA Base Address offsets: 0x0 and 0xc0 only.
42.2.6 MCI
42.2.6.1 MCI: Busy signal of R1b responses is not taken in account
The busy status of the card during the response (R1b) is ignored for the commands CMD7, CMD28, CMD29,
CMD38, CMD42, CMD56. Additionally, for commands CMD42 and CMD56 a conflict can occur on data line 0 if the
MCI sends data to the card while the card is still busy.
The behavior is correct for CMD12 command (STOP_TRANSFER).
Problem Fix/Workaround
None
42.2.6.2 MCI: Data Timeout Error Flag
As the data timeout error flag cannot rise, the MCI is stalled indefinitely waiting for the data start bit.
Problem Fix/Workaround
A STOP command must be sent with a software timeout.
42.2.6.3 MCI: STREAM command not supported
The STREAM READ/WRITE commands are not supported by the MCI.
Problem Fix/Workaround
None.
42.2.6.4 MCI: STOP during a WRITE_MULTIPLE_BLOCK command
The WRITE_MULTIPLE_BLOCK with a transfer size (PDC) not a multiple of the block length is not stopped by the
STOP command.
Problem Fix/Workaround
Choose an appropriate size for the block length.
42.2.7 NTRST
42.2.7.1 NTRST: Device does not boot correctly due to powerup sequencing issue
The NTRST signal is powered by VDDIOP power supply (3.3V) and the ARM processor is powered by VDDCORE
power supply (1.2V).