Datasheet

691
SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
38.10 Peripheral Timings
38.10.1 SPI
38.10.1.1 Maximum SPI Frequency
The following formulas give maximum SPI frequency in Master read and write modes and in Slave read and write
modes.
Master Write Mode
The SPI only sends data to a slave device such as an LCD, for example. The limit is given by SPI
2
(or SPI
5
) timing.
Since it gives a maximum frequency above the maximum pad speed, the maximum SPI frequency is the one from
the pad.
Master Read Mode
t
valid
is the slave time response to output data after deleting an SPCK edge. For a non-volatile memory with t
valid
(or t
v
) = 12 ns, f
SPCK
max = 35.4 MHz at V
DDIO
= 3.3V.
Slave Read Mode
In slave mode, SPCK is the input clock for the SPI. The maximum SPCK frequency is given by setup and hold
timings SPI
7
/SPI
8
(or SPI
10
/SPI
11
). Since this gives a frequency well above the pad limit, the limit in slave read
mode is given by the SPCK pad.
Slave Write Mode
For 3.3V I/O domain and SPI6, f
SPCK
Max = 33 MHz. t
setup
is the setup time from the master before sampling data.
38.10.1.2 Timing Conditions
Timings are given assuming a capacitance load on MISO, SPCK and MOSI as defined in Table 38-21.
38.10.1.3 Timing Extraction
In Figure 38-8 ”SPI Master mode with (CPOL = 0 and NCPHA = 1) or (CPOL = 1 and NCPHA = 0)” and Figure 38-
9 ”SPI Master mode with (CPOL = NCPHA = 0) or (CPOL = NCPHA = 1)” the MOSI line shifting edge is
represented with a hold time = 0. However, it is important to note that for this device, the MISO line is sampled
prior to the MOSI line shifting edge. As shown in Figure 38-7 ”MISO Capture in Master Mode”, the device sampling
point extends the propagation delay (tp) for slave and routing delays to more than half the SPI clock period,
whereas the common sampling point allows only less than half the SPI clock period.
As an example, an SPI Slave working in Mode 0 is safely driven if the SPI Master is configured in Mode 0.
f
SPCK
Max
1
SPI
0
orSPI
3
()t
valid
+
------------------------------------------------------
=
f
SPCK
Max
1
SPI
6
orSPI
9
()t
setup
+
-------------------------------------------------------
=
Table 38-21. Capacitance Load for MISO, SPCK and MOSI
IO Supply
Corner
MAX
3.3V 40 pF
1.8V 20 pF