Datasheet

689
SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
SDRAMC
15
CAS Low before SDCK Rising Edge t
CPSDCK
/2 - 0.4 t
CPSDCK
/2 - 0.2 ns
SDRAMC
16
CAS High after SDCK Rising Edge t
CPSDCK
/2 - 0.3 t
CPSDCK
/2 - 0.3 ns
SDRAMC
17
DQM Change before SDCK Rising Edge t
CPSDCK
/2 - 3.4 t
CPSDCK
/2 - 3.3 ns
SDRAMC
18
DQM Change after SDCK Rising Edge t
CPSDCK
/2 - 0.5 t
CPSDCK
/2 - 0.5 ns
SDRAMC
19
D0–D15 in Setup before SDCK Rising Edge 1.4 1.4 ns
SDRAMC
20
D0–D15 in Hold after SDCK Rising Edge 0.1 0.0 ns
SDRAMC
21
D16–D31 in Setup before SDCK Rising Edge 1.8 1.8 ns
SDRAMC
22
D16–D31 in Hold after SDCK Rising Edge 0.0 0.0 ns
SDRAMC
23
SDWE Low before SDCK Rising Edge t
CPSDCK
/2 - 0.2 t
CPSDCK
/2 - 0.1 ns
SDRAMC
24
SDWE High after SDCK Rising Edge t
CPSDCK
/2 - 0.4 t
CPSDCK
/2 - 0.4 ns
SDRAMC
25
D0–D15 Out Valid before SDCK Rising Edge t
CPSDCK
/2 -1.3 t
CPSDCK
/2 - 1.1 ns
SDRAMC
26
D0–D15 Out Valid after SDCK Rising Edge t
CPSDCK
/2 - 0.6 t
CPSDCK
/2 - 0.6 ns
SDRAMC
27
D16–D31 Out Valid before SDCK Rising Edge t
CPSDCK
/2 - 3.9 t
CPSDCK
/2 - 3.9 ns
SDRAMC
28
D16–D31 Out Valid after SDCK Rising Edge t
CPSDCK
/2 - 0.5 t
CPSDCK
/2 - 0.5 ns
Table 38-20. SDRAM Signals (Continued)
Symbol Parameter
Min
Unit1.8V Supply 3.3V Supply