Datasheet

SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
636
37.5.3 LCD Interface
The LCD Controller interfaces with the LCD Module through the LCD Interface (Table 37-11 on page 640). The
Controller supports the following interface configurations: 24-bit TFT single scan, 16-bit STN Dual Scan Mono
(Color), 8-bit STN Dual (Single) Scan Mono (Color), 4-bit single scan Mono (Color).
A 4-bit single scan STN display uses 4 parallel data lines to shift data to successive single horizontal lines one at a
time until the entire frame has been shifted and transferred. The 4 LSB pins of LCD Data Bus (LCDD [3:0]) can be
directly connected to the LCD driver; the 20 MSB pins (LCDD [23:4]) are not used.
An 8-bit single scan STN display uses 8 parallel data lines to shift data to successive single horizontal lines one at
a time until the entire frame has been shifted and transferred. The 8 LSB pins of LCD Data Bus (LCDD [7:0]) can
be directly connected to the LCD driver; the 16 MSB pins (LCDD [23:8]) are not used.
An 8-bit Dual Scan STN display uses two sets of 4 parallel data lines to shift data to successive upper and lower
panel horizontal lines one at a time until the entire frame has been shifted and transferred. The bus LCDD[3:0] is
connected to the upper panel data lines and the bus LCDD[7:4] is connected to the lower panel data lines. The rest
of the LCD Data Bus lines (LCDD[23:8]) are not used.
A 16-bit Dual Scan STN display uses two sets of 8 parallel data lines to shift data to successive upper and lower
panel horizontal lines one at a time until the entire frame has been shifted and transferred. The bus LCDD[7:0] is
connected to the upper panel data lines and the bus LCDD[15:8] is connected to the lower panel data lines. The
rest of the LCD Data Bus lines (LCDD[23:16]) are not used.
STN Mono displays require one bit of image data per pixel. STN Color displays require three bits (Red, Green and
Blue) of image data per pixel, resulting in a horizontal shift register of length three times the number of pixels per
horizontal line. This RGB or Monochrome data is shifted to the LCD driver as consecutive bits via the parallel data
lines.
A TFT single scan display uses up to 24 parallel data lines to shift data to successive horizontal lines one at a time
until the entire frame has been shifted and transferred. The 24 data lines are divided in three bytes that define the
color shade of each color component of each pixel. The LCDD bus is split as LCDD[23:16] for the blue component,
LCDD[15:8] for the green component and LCDD[7:0] for the red component. If the LCD Module has lower color
resolution (fewer bits per color component), only the most significant bits of each component are used.
All these interfaces are shown in Figure 37-6 to Figure 37-10. Figure 37-6 shows the 24-bit single scan TFT
display timing; Figure 37-7 on page 637 shows the 4-bit single scan STN display timing for monochrome and color
modes; Figure 37-8 on page 637 shows the 8-bit single scan STN display timing for monochrome and color
modes; Figure 37-9 on page 638 shows the 8-bit Dual Scan STN display timing for monochrome and color modes;
Figure 37-10 on page 639 shows the 16-bit Dual Scan STN display timing for monochrome and color modes.
Figure 37-6. TFT Timing (First Line Expanded View)
LCDVSYNC
LCDDEN
LCDHSYNC
LCDDOTCK
LCDD [24:16]
LCDD [15:8]
LCDD [7:0]
G0
B0
R0
G1
B1
R1