Datasheet

SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
634
Figure 37-4. TFT Panel Timing, CLKMOD = 0, VPW = 2, VBP = 2, VFP = 1
Figure 37-5. TFT Panel Timing (Line Expanded View), CLKMOD=1
Usually the LCD_FRM rate is about 70 Hz to 75 Hz. It is given by the following equation:
where:
 HOZVAL determines de number of LCDDOTCK cycles per line
 LINEVAL determines the number of LCDHSYNC cycles per frame, according to the expressions shown
below:
In STN Mode:
VHDLY+1 HBP+1 HPW+1 HFP+2
HOZVAL+1
LCDDOTCK
LCDD
1 PCLK
1/2 PCLK 1/2 PCLK
Line Period
LCDVSYNC
LCDHSYNC
LCDDEN
(VPW+1) Lines
LCDVSYNC
LCDDOTCK
LCDD
LCDDEN
VHDLY+1
LCDHSYNC
Vertical Fron t Porch = VFP Lines
Vertical Back Porch = VBP Lines
Frame Period
VHDLY+1 HBP+1 HPW+1 HFP+2
HOZVAL+1
LCDDOTCK
LCDD
1 PCLK
1/2 PCLK
1/2 PCLK
Line Period
LCDVSYNC
LCDHSYNC
LCDDEN
1
f
LCDVSYNC
----------------------------
VHDLY HPW HBP HOZVAL HFP 5+++ ++
f
LCDDOTCK
--------------------------------------------------------------------------------------------------------------------


VBP LINEVAL VFP 1+++()=
HOZVAL
Horizontal_display_size
Number_data_lines
----------------------------------------------------------
1–=
LINEVAL Vertical_display_size 1–=