Datasheet

621
SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
37. LCD Controller (LCDC)
37.1 Overview
The LCD Controller (LCDC) consists of logic for transferring LCD image data from an external display buffer to an
LCD module with integrated common and segment drivers.
The LCD Controller supports single and double scan monochrome and color passive STN LCD modules and
single scan active TFT LCD modules. On monochrome STN displays, up to 16 gray shades are supported using a
time-based dithering algorithm and Frame Rate Control (FRC) method. This method is also used in color STN
displays to generate up to 4096 colors.
The LCD Controller has a display input buffer (FIFO) to allow a flexible connection of the external AHB master
interface, and a lookup table to allow palletized display configurations.
The LCD Controller is programmable in order to support many different requirements such as resolutions up to
2048 x 2048; pixel depth (1, 2, 4, 8, 16, 24 bits per pixel); data line width (4, 8, 16 or 24 bits) and interface timing.
The LCD Controller is connected to the ARM Advanced High Performance Bus (AHB) as a master for reading pixel
data. However, the LCD Controller interfaces with the AHB as a slave in order to configure its registers.