Datasheet

SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
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ISOERROR: A CRC error has been detected in an isochronous transfer.
Read:
0: No error in the previous isochronous transfer.
1: CRC error has been detected, data available in the FIFO are corrupted.
Write:
0: Resets the ISOERROR flag, clears the interrupt.
1: No effect.
• TXPKTRDY: Transmit Packet Ready
This flag is cleared by the USB device.
This flag is set by the USB device firmware.
Read:
0: There is no data to send.
1: The data is waiting to be sent upon reception of token IN.
Write:
0: Can be used in the procedure to cancel transmission data. (See Section 36.6.2.9 “Transmit Data Cancellation” on page
598.)
1: A new data payload has been written in the FIFO by the firmware and is ready to be sent.
This flag is used to generate a Data IN transaction (device to host). Device firmware checks that it can write a data payload
in the FIFO, checking that TXPKTRDY is cleared. Transfer to the FIFO is done by writing in the UDP_FDRx. Once the data
payload has been transferred to the FIFO, the firmware notifies the USB device setting TXPKTRDY to one. USB bus trans-
actions can start. TXCOMP is set once the data payload has been received by the host.
After setting or clearing this bit, a wait time of 3 UDPCK clock cycles and 3 peripheral clock cycles is required before
accessing DPR.
• FORCESTALL: Force Stall (used by Control, Bulk and Isochronous Endpoints)
Read:
0: Normal state.
1: Stall state.
Write:
0: Return to normal state.
1: Send STALL to the host.
Refer to chapters 8.4.5 and 9.4.5 of the Universal Serial Bus Specification, Rev. 2.0 for more information on the STALL
handshake.
Control endpoints: During the data stage and status stage, this bit indicates that the microcontroller cannot complete the
request.
Bulk and interrupt endpoints: This bit notifies the host that the endpoint is halted.
The host acknowledges the STALL, device firmware is notified by the STALLSENT flag.