Datasheet

61
SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
Figure 11-6. AMP Mictor Connector Orientation
11.5.6 IEEE 1149.1 JTAG Boundary Scan
IEEE 1149.1 JTAG Boundary Scan allows pin-level access independent of the device packaging technology.
IEEE 1149.1 JTAG Boundary Scan is enabled when JTAGSEL is high. The SAMPLE, EXTEST and BYPASS
functions are implemented. In ICE debug mode, the ARM processor responds with a non-JTAG chip ID that
identifies the processor to the ICE system. This is not IEEE 1149.1 JTAG-compliant.
It is not possible to switch directly between JTAG and ICE operations. A chip reset must be performed after
JTAGSEL is changed.
A Boundary-scan Descriptor Language (BSDL) file is provided to set up test.
11.5.6.1 JTAG Boundary-scan Register
The Boundary-scan Register (BSR) contains 484 bits that correspond to active pins and associated control
signals.
Each SAM9261 input/output pin corresponds to a 3-bit register in the BSR. The OUTPUT bit contains data that
can be forced on the pad. The INPUT bit facilitates the observability of data applied to the pad. The CONTROL bit
selects the direction of the pad.
38 37
2 1
Pin 1Chamfer
AT91SAM9261-based
Application Board
Table 11-3. SAM9261 JTAG Boundary Scan Register
Bit Number Pin Name Pin Type Associated BSR Cells
483 A18 OUT OUTPUT
482 A[22:16] CONTROL
481 A19 OUT OUTPUT
480 A20 OUT OUTPUT
479 A21 OUT OUTPUT
478 A22 OUT OUTPUT
477 NCS0 OUT OUTPUT
476 A[7:0] CONTROL
475 NCS1 OUT OUTPUT
474 NCS0/NCS1/NCS2/NCS3/NRD/NWR0/NWR1/NWR3 CONTROL
473 NCS2 OUT OUTPUT
472 NCS3 OUT OUTPUT
471 NRD OUT OUTPUT