Datasheet

SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
592
36.6.2.2 Data IN Transaction
Data IN transactions are used in control, isochronous, bulk and interrupt transfers and conduct the transfer of data
from the device to the host. Data IN transactions in isochronous transfer must be done using endpoints with ping-
pong attributes.
36.6.2.3Using Endpoints Without Ping-pong Attributes
To perform a Data IN transaction using a non ping-pong endpoint:
1. The application checks if it is possible to write in the FIFO by polling TXPKTRDY in the endpoint’s
UDP_CSRx (TXPKTRDY must be cleared).
2. The application writes the first packet of data to be sent in the endpoint’s FIFO, writing zero or more byte
values in the endpoint’s UDP_FDRx,
3. The application notifies the USB peripheral it has finished by setting the TXPKTRDY in the endpoint’s
UDP_CSRx.
4. The application is notified that the endpoint’s FIFO has been released by the USB device when TXCOMP in
the endpoint’s UDP_CSRx has been set. Then an interrupt for the corresponding endpoint is pending while
TXCOMP is set.
5. The microcontroller writes the second packet of data to be sent in the endpoint’s FIFO, writing zero or more
byte values in the endpoint’s UDP_FDRx,
6. The microcontroller notifies the USB peripheral it has finished by setting the TXPKTRDY in the endpoint’s
UDP_CSRx.
7. The application clears the TXCOMP in the endpoint’s UDP_CSRx.
After the last packet has been sent, the application must clear TXCOMP once this has been set.
TXCOMP is set by the USB device when it has received an ACK PID signal for the Data IN packet. An interrupt is
pending while TXCOMP is set.
Warning: TX_COMP must be cleared after TX_PKTRDY has been set.
Note: Refer to Chapter 8 of the Universal Serial Bus Specification, Rev 2.0, for more information on the Data IN protocol
layer.
Figure 36-6. Data IN Transfer for Non Ping-pong Endpoint
USB Bus Packets
Data IN 2
Data IN NAK
ACK
Data IN 1
FIFO (DPR)
Content
Data IN 2Load In ProgressData IN 1
Cleared by Firmware
DPR access by the firmware
Payload in FIFO
TXCOMP Flag
(UDP_CSRx)
TXPKTRDY Flag
(UDP_CSRx)
PID
Data IN Data IN
PIDPID PIDPID
ACK
PID
Prevous Data IN TX Microcontroller Load Data in FIFO Data is Sent on USB Bus
Interrupt
Pending
Interrupt Pending
Set by the firmware
Set by the firmware
Cleared by
Firmware
Cleared by Hw
Cleared by Hw
DPR access by the hardware