Datasheet

SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
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11. Debug and Test
11.1 Overview
The SAM9261 features a number of complementary debug and test capabilities. A common JTAG/ICE (In-Circuit
Emulator) port is used for standard debugging functions, such as downloading code and single-stepping through
programs. An ETM (Embedded Trace Macrocell) provides more sophisticated debug features such as address
and data comparators, half-rate clock mode, counters, sequencer and FIFO. The Debug Unit provides a two-pin
UART that can be used to upload an application into internal SRAM. It manages the interrupt handling of the
internal COMMTX and COMMRX signals that trace the activity of the Debug Communication Channel.
A set of dedicated debug and test input/output pins gives direct access to these capabilities from a PC-based test
environment.
11.2 Block Diagram
Figure 11-1. Debug and Test Block Diagram
2
ETMICE-RT
ARM9EJ-S
PDC
DBGU
PIO
DRXD
DTXD
TPK0-TPK15
TPS0-TPS2
TSYNC
TCLK
TMS
TCK
TDI
JTAGSEL
TDO
TST
Reset
and
Test
TAP: Test Access Port
Boundary
Port
ICE/JTAG
TAP
ARM926EJ-S
POR
RTCK
NTRST