Datasheet

SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
256
24.9.11 PMC Master Clock Register
Name: PMC_MCKR
Address: 0xFFFFFC30
Access: Read/Write
• CSS: Master Clock Selection
• PRES: Processor Clock Prescaler
• MDIV: Master Clock Division
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
–––––– MDIV
76543210
– – – PRES CSS
Value Clock Source Selection
0 0 Slow Clock is selected
0 1 Main Clock is selected
1 0 PLL A Clock is selected
1 1 PLL B Clock is selected
Value Processor Clock
0 0 0 Selected clock
0 0 1 Selected clock divided by 2
0 1 0 Selected clock divided by 4
0 1 1 Selected clock divided by 8
1 0 0 Selected clock divided by 16
1 0 1 Selected clock divided by 32
1 1 0 Selected clock divided by 64
111Reserved
Value Master Clock Division
0 0 Master Clock is Processor Clock.
0 1 Master Clock is Processor Clock divided by 2.
1 0 Master Clock is Processor Clock divided by 4.
1 1 Reserved.