Datasheet

183
SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
20.12.2 Switching from (to) Slow Clock Mode to (from) Normal Mode
When switching from slow clock mode to the normal mode, the current slow clock mode transfer is completed at
high clock rate, with the set of slow clock mode parameters. See Figure 20-32. The external device may not be fast
enough to support such timings.
Figure 20-33 illustrates the recommended procedure to properly switch from one mode to the other.
Figure 20-32. Clock Rate Transition Occurs while the SMC is Performing a Write Operation
Figure 20-33. Recommended Procedure to Switch from Slow Clock Mode to Normal Mode or from Normal Mode to Slow Clock
Mode
A
[25:2]
NCS
1
MCK
NWE
1
1
NWE_CYCLE = 3
SLOW CLOCK MODE WRITE
Slow Clock Mode
internal signal from PMC
111 2
3
2
NWE_CYCLE = 7
NORMAL MODE WRITE
Slow clock mode transition is detected:
Reload Configuration Wait State
This write cycle finishes with the slow clock mode set
of parameters after the clock rate transition
SLOW CLOCK MODE WRITE
NBS0, NBS1,
NBS2, NBS3,
A0,A1
A [25:2]
NCS
1
MCK
NWE
1
1
SLOW CLOCK MODE WRITE
Slow Clock Mode
internal signal from PMC
2
3
2
NORMAL MODE WRITEIDLE STATE
Reload Configuration
Wait State
NBS0, NBS1,
NBS2, NBS3,
A0,A1