Datasheet

SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
166
20.8.4 Write Mode
The WRITE_MODE parameter in the SMC_MODE register of the corresponding chip select indicates which signal
controls the write operation.
20.8.4.1 Write is Controlled by NWE (WRITE_MODE = 1):
Figure 20-14 shows the waveforms of a write operation with WRITE_MODE set to 1. The data is put on the bus
during the pulse and hold steps of the NWE signal. The internal data buffers are turned out after the NWE_SETUP
time, and until the end of the write cycle, regardless of the programmed waveform on NCS.
Figure 20-14. WRITE_MODE = 1. The write operation is controlled by NWE
20.8.4.2 Write is Controlled by NCS (WRITE_MODE = 0)
Figure 20-15 shows the waveforms of a write operation with WRITE_MODE set to 0. The data is put on the bus
during the pulse and hold steps of the NCS signal. The internal data buffers are turned out after the
NCS_WR_SETUP time, and until the end of the write cycle, regardless of the programmed waveform on NWE.
Figure 20-15. WRITE_MODE = 0. The write operation is controlled by NCS
MCK
D[31:0]
NCS
A
[25:2]
NBS0, NBS1,
NBS2, NBS3,
A0, A1
NWE,
NWR0, NWR1,
NWR2, NWR3
MCK
D[31:0]
NCS
NWE,
NWR0, NWR1,
NWR2, NWR3
A
[25:2]
NBS0, NBS1,
NBS2, NBS3,
A0, A1