Datasheet

157
SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
20.7 Connection to External Devices
20.7.1 Data Bus Width
A data bus width of 8, 16, or 32 bits can be selected for each chip select. This option is controlled by the field DBW
in SMC_MODE (Mode Register) for the corresponding chip select.
Figure 20-3 shows how to connect a 512K x 8-bit memory on NCS2. Figure 20-4 shows how to connect a 512K x
16-bit memory on NCS2. Figure 20-5 shows two 16-bit memories connected as a single 32-bit memory
20.7.2 Byte Write or Byte Select Access
Each chip select with a 16-bit or 32-bit data bus can operate with one of two different types of write access: byte
write or byte select access. This is controlled by the field SMC_MODE.BAT for the corresponding chip select.
Figure 20-3. Memory Connection for an 8-bit Data Bus
Figure 20-4. Memory Connection for a 16-bit Data Bus
Figure 20-5. Memory Connection for a 32-bit Data Bus
SMC
A0
NWE
NRD
NCS[2]
A0
Write Enable
Output Enable
Memory Enable
D[7:0] D[7:0]
A[18:2]
A[18:2]
A1
A1
SMC
NBS0
NWE
NRD
NCS[2]
Low Byte Enable
Write Enable
Output Enable
Memory Enable
NBS1 High Byte Enable
D[15:0] D[15:0]
A[19:2]
A[18:1]
A[0]A1
D[31:16]
SMC
NBS0
NWE
NRD
NCS[2]
NBS1
D[15:0]
A[20:2]
D[31:16]
NBS2
NBS3
Byte 0 Enable
Write Enable
Output Enable
Memory Enable
Byte 1 Enable
D[15:0]
A[18:0]
Byte 2 Enable
Byte 3 Enable