Datasheet

143
SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
Figure 19-6. NAND Flash Signal Multiplexing on EBI Pins
The address latch enable and command latch enable signals on the NAND Flash device are driven by address bits
A22 and A21 of the EBI address bus. The user should note that any bit on the EBI address bus can also be used
for this purpose. The command, address or data words on the data bus of the NAND Flash device are
distinguished by using their address within the NCS3 address space. The chip enable (CE) signal of the device
and the ready/busy (R/B) signals are connected to PIO lines. The CE signal then remains asserted even when
NCS3 is not selected, preventing the device from returning to standby mode.
SMC
NRD
NWR0_NWE
NANDOE
NANDWE
NAND Flash Logic
NCS3
MUX Logic
CS3A
NCS7_NANDWE
NCS6_NANDOE
CS3A
NCS7
NCS6