Datasheet

135
SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
Notes: 1. NWR1 enables upper byte writes. NWR0 enables lower byte writes.
2. NWRx enables corresponding byte x writes. (x = 0, 1, 2 or 3)
3. NBS0 and NBS1 enable respectively lower and upper bytes of the lower 16-bit word.
4. NBS2 and NBS3 enable respectively lower and upper bytes of the upper 16-bit word.
5. BEx: Byte x Enable (x = 0,1,2 or 3)
NWR0/NWE WE WE
(1)
WE WE
(2)
WE WE
NWR1/NBS1 – WE
(1)
NUB WE
(2)
NUB
(3)
BE1
(5)
NWR3/NBS3 – – – WE
(2)
NUB
(4)
BE3
(5)
Table 19-4. EBI Pins and External Devices Connections
Pins
Pins of the Interfaced Device
SDRAMC SMC
SDRAM CompactFlash
CompactFlash
True IDE Mode
NAND Flash
D0–D7 D0–D7 D0–D7 D0–D7 I/O0-I/O7
D8–D15 D8–D15 D8–15 D8–15 I/O8-I/O15
D16–D31 D16–D31 – – –
A0/NBS0 DQM0 A0 A0 –
A1/NWR2/NBS2 DQM2 A1 A1 –
A2–A10 A[0:8] A[2:10] A[2:10] –
A11 A9 – – –
SDA10 A10 – – –
A12 – – – –
A13–A14 A[11:12] – – –
A15 – – – –
A16/BA0 BA0 – – –
A17/BA1 BA1 – – –
A18–A20 – – – –
A21 – – – CLE
A22 – REG REG ALE
A23–A24 – – – –
A25 – CFRNW
(1)
CFRNW
(1)
–
NCS0 – – – –
NCS1/SDCS CS – – –
NCS2 – – – –
NCS3/NANDCS – – – CE
(3)
NCS4/CFCS0 – CFCS0
(1)
CFCS0
(1)
–
Table 19-3. EBI Pins and External Static Devices Connections (Continued)
Pins
Pins of the SMC Interfaced Device
8-bit Static
Device
2 x 8-bit
Static
Devices
16-bit Static
Device
4 x 8-bit
Static
Devices
2 x 16-bit
Static
Devices
32-bit Static
Device