Datasheet

SAM9261 [DATASHEET]
Atmel-6062O-ATARM-SAM9261-Datasheet_21-Jun-16
134
19.4 Application Example
19.4.1 Hardware Interface
Table 19-3 and Table 19-4 detail the connections to be applied between the EBI pins and the external devices for
each Memory Controller.
Table 19-2. EBI Pins and Memory Controllers I/O Lines Connections
EBI Pins SDRAMC I/O Lines SMC I/O Lines
NWR1/NBS1/CFIOR NBS1 NWR1/NUB
A0/NBS0 Not Supported SMC_A0/NLB
A1/NBS2/NWR2 Not Supported SMC_A1
A[11:2] SDRAMC_A[9:0] SMC_A[11:2]
SDA10 SDRAMC_A10 Not Supported
A12 Not Supported SMC_A12
A[14:13] SDRAMC_A[12:11] SMC_A[14:13]
A[25:15] Not Supported SMC_A[25:15]
D[31:16] D[31:16] D[31:16]
D[15:0] D[15:0] D[15:0]
Table 19-3. EBI Pins and External Static Devices Connections
Pins
Pins of the SMC Interfaced Device
8-bit Static
Device
2 x 8-bit
Static
Devices
16-bit Static
Device
4 x 8-bit
Static
Devices
2 x 16-bit
Static
Devices
32-bit Static
Device
D0–D7 D0–D7 D0–D7 D0–D7 D0–D7 D0–D7 D0–D7
D8–D15 – D8–D15 D8–D15 D8–D15 D8–15 D8–15
D16–D23 – – – D16–D23 D16–D23 D16–D23
D24–D31 – – – D24–D31 D24–D31 D24–D31
A0/NBS0 A0 – NLB – NLB
(3)
BE0
(5)
A1/NWR2/NBS2 A1 A0 A0 WE
(2)
NLB
(4)
BE2
(5)
A2–A25 A[2:25] A[1:24] A[1:24] A[0:23] A[0:23] A[0:23]
NCS0 CS CS CS CS CS CS
NCS1/SDCS CS CS CS CS CS CS
NCS2 CS CS CS CS CS CS
NCS3/NANDCS CS CS CS CS CS CS
NCS4/CFCS0 CS CS CS CS CS CS
NCS5/CFCS1 CS CS CS CS CS CS
NCS6/NAND0E CS CS CS CS CS CS
NCS7/NANDWE CS CS CS CS CS CS
NRD/CFOE OE OE OE OE OE OE