Datasheet

ManualsBrandsMicrochip ManualsARM MicrocontrollersARM SAM Microcontroller 64KB LQFP

751

752

753

754

755

756

757

758

759

760

Table Of Contents

Features
1. Description
- 1.1 Configuration Summary of the SAM7S512, SAM7S256, SAM7S128, SAM7S64, SAM7S321, SAM7S32, SAM7S161 and SAM7S16
2. Block Diagram
3. Signal Description
4. Package and Pinout
- 4.1 64-lead LQFP and 64-pad QFN Package Outlines
- 4.2 64-lead LQFP and 64-pad QFN Pinout
- 4.3 48-lead LQFP and 48-pad QFN Package Outlines
- 4.4 48-lead LQFP and 48-pad QFN Pinout
5. Power Considerations
- 5.1 Power Supplies
- 5.2 Power Consumption
- 5.3 Voltage Regulator
- 5.4 Typical Powering Schematics
6. I/O Lines Considerations
- 6.1 JTAG Port Pins
- 6.2 Test Pin
- 6.3 Reset Pin
- 6.4 ERASE Pin
- 6.5 PIO Controller A Lines
- 6.6 I/O Line Drive Levels
7. Processor and Architecture
- 7.1 ARM7TDMI Processor
- 7.2 Debug and Test Features
- 7.3 Memory Controller
- 7.4 Peripheral DMA Controller
8. Memories
- 8.1 SAM7S512
- 8.2 SAM7S256
- 8.3 SAM7S128
- 8.4 SAM7S64
- 8.5 SAM7S321/32
- 8.6 SAM7S161/16
- 8.7 Memory Mapping
- 8.8 Embedded Flash
- 8.9 Fast Flash Programming Interface
- 8.10 SAM-BA Boot Assistant
9. System Controller
- 9.1 Reset Controller
  - 9.1.1 Brownout Detector and Power-on Reset
- 9.2 Clock Generator
- 9.3 Power Management Controller
- 9.4 Advanced Interrupt Controller
- 9.5 Debug Unit
- 9.6 Periodic Interval Timer
- 9.7 Watchdog Timer
- 9.8 Real-time Timer
- 9.9 PIO Controller
- 9.10 Voltage Regulator Controller
10. Peripherals
- 10.1 User Interface
- 10.2 Peripheral Identifiers
- 10.3 Peripheral Multiplexing on PIO Lines
- 10.4 PIO Controller A Multiplexing
- 10.5 Serial Peripheral Interface
- 10.6 Two-wire Interface
- 10.7 USART
- 10.8 Serial Synchronous Controller
- 10.9 Timer Counter
- 10.10 PWM Controller
- 10.11 USB Device Port (Does not pertain to SAM7S32/16)
- 10.12 Analog-to-digital Converter
11. ARM7TDMI Processor Overview
- 11.1 Overview
- 11.2 ARM7TDMI Processor
12. Debug and Test Features
- 12.1 Description
- 12.2 Block Diagram
- 12.3 Application Examples
  - 12.3.1 Debug Environment
  - 12.3.2 Test Environment
- 12.4 Debug and Test Pin Description
- 12.5 Functional Description
13. Reset Controller (RSTC)
- 13.1 Overview
- 13.2 Block Diagram
- 13.3 Functional Description
- 13.4 Reset Controller (RSTC) User Interface
14. Real-time Timer (RTT)
- 14.1 Overview
- 14.2 Block Diagram
- 14.3 Functional Description
- 14.4 Real-time Timer (RTT) User Interface
15. Periodic Interval Timer (PIT)
- 15.1 Overview
- 15.2 Block Diagram
- 15.3 Functional Description
- 15.4 Periodic Interval Timer (PIT) User Interface
16. Watchdog Timer (WDT)
- 16.1 Overview
- 16.2 Block Diagram
- 16.3 Functional Description
- 16.4 Watchdog Timer (WDT) User Interface
17. Voltage Regulator Mode Controller (VREG)
- 17.1 Overview
- 17.2 Voltage Regulator Power Controller (VREG) User Interface
  - 17.2.1 Voltage Regulator Mode Register
18. Memory Controller (MC)
- 18.1 Overview
- 18.2 Block Diagram
- 18.3 Functional Description
- 18.4 Memory Controller (MC) User Interface
19. Embedded Flash Controller (EFC)
- 19.1 Overview
- 19.2 Functional Description
- 19.3 Embedded Flash Controller (EFC) User Interface
20. Fast Flash Programming Interface (FFPI)
- 20.1 Overview
- 20.2 Parallel Fast Flash Programming
- 20.3 Serial Fast Flash Programming
21. SAM7 Boot Program
- 21.1 Description
- 21.2 Flow Diagram
- 21.3 Device Initialization with USB
- 21.4 Device Initialization without USB
- 21.5 SAM-BA Boot
- 21.6 Hardware and Software Constraints
22. Peripheral DMA Controller (PDC)
- 22.1 Overview
- 22.2 Block Diagram
- 22.3 Functional Description
- 22.4 Peripheral DMA Controller (PDC) User Interface
23. Advanced Interrupt Controller (AIC)
- 23.1 Overview
- 23.2 Block Diagram
- 23.3 Application Block Diagram
- 23.4 AIC Detailed Block Diagram
- 23.5 I/O Line Description
- 23.6 Product Dependencies
- 23.7 Functional Description
- 23.8 Advanced Interrupt Controller (AIC) User Interface
24. Clock Generator
- 24.1 Overview
- 24.2 Slow Clock RC Oscillator
- 24.3 Main Oscillator
- 24.4 Divider and PLL Block
  - 24.4.1 PLL Filter
  - 24.4.2 Divider and Phase Lock Loop Programming
25. Power Management Controller (PMC)
- 25.1 Description
- 25.2 Master Clock Controller
- 25.3 Processor Clock Controller
- 25.4 USB Clock Controller
- 25.5 Peripheral Clock Controller
- 25.6 Programmable Clock Output Controller
- 25.7 Programming Sequence
- 25.8 Clock Switching Details
  - 25.8.1 Master Clock Switching Timings
  - 25.8.2 Clock Switching Waveforms
- 25.9 Power Management Controller (PMC) User Interface
26. Debug Unit (DBGU)
- 26.1 Overview
- 26.2 Block Diagram
- 26.3 Product Dependencies
- 26.4 UART Operations
- 26.5 Debug Unit (DBGU) User Interface
27. Parallel Input/Output Controller (PIO)
- 27.1 Overview
- 27.2 Block Diagram
- 27.3 Product Dependencies
- 27.4 Functional Description
- 27.5 I/O Lines Programming Example
- 27.6 Programmable Multibit ECC Error Location (PIO) User Interface
28. Serial Peripheral Interface (SPI)
- 28.1 Overview
- 28.2 Block Diagram
- 28.3 Application Block Diagram
- 28.4 Signal Description
- 28.5 Product Dependencies
- 28.6 Functional Description
- 28.7 Serial Peripheral Interface (SPI) User Interface User Interface
29. Two-wire Interface (TWI) SAM7S512/256/128/64/321/32
- 29.1 Overview
- 29.2 List of Abbreviations
- 29.3 Block Diagram
- 29.4 Application Block Diagram
  - 29.4.1 I/O Lines Description
- 29.5 Product Dependencies
- 29.6 Functional Description
- 29.7 Two-wire Interface (TWI) User Interface
30. Two Wire Interface (TWI) SAM7S161/16
- 30.1 Overview
- 30.2 List of Abbreviations
- 30.3 Block Diagram
- 30.4 Application Block Diagram
  - 30.4.1 I/O Lines Description
- 30.5 Product Dependencies
- 30.6 Functional Description
  - 30.6.1 Transfer Format
  - 30.6.2 Modes of Operation
- 30.7 Master Mode
- 30.8 Multi-master Mode
  - 30.8.1 Definition
  - 30.8.2 Different Multi-master Modes
    - 30.8.2.1 TWI as Master Only
    - 30.8.2.2 TWI as Master or Slave
- 30.9 Slave Mode
- 30.10 Two-wire Interface (TWI) User Interface
31. Universal Synchronous Asynchronous Receiver Transceiver (USART)
- 31.1 Overview
- 31.2 Block Diagram
- 31.3 Application Block Diagram
- 31.4 I/O Lines Description
- 31.5 Product Dependencies
- 31.6 Functional Description
- 31.7 Universal Synchronous Asynchronous Receiver Transmitter (USART) User Interface
32. Synchronous Serial Controller (SSC)
- 32.1 Description
- 32.2 Block Diagram
- 32.3 Application Block Diagram
- 32.4 Pin Name List
- 32.5 Product Dependencies
- 32.6 Functional Description
- 32.7 SSC Application Examples
- 32.8 Syncrhronous Serial Controller (SSC) User Interface
33. Timer Counter (TC)
- 33.1 Overview
- 33.2 Block Diagram
- 33.3 Pin Name List
- 33.4 Product Dependencies
- 33.5 Functional Description
- 33.6 Timer Counter (TC) User Interface
34. Pulse Width Modulation Controller (PWM)
- 34.1 overview
- 34.2 Block Diagram
- 34.3 I/O Lines Description
- 34.4 Product Dependencies
- 34.5 Functional Description
- 34.6 Pulse Width Modulation Controller (PWM) User Interface
35. USB Device Port (UDP)
- 35.1 Overview
- 35.2 Block Diagram
- 35.3 Product Dependencies
- 35.4 Typical Connection
  - 35.4.1 USB Device Transceiver
  - 35.4.2 VBUS Monitoring
- 35.5 Functional Description
- 35.6 USB Device Port (UDP) User Interface
36. Analog-to-Digital Converter (ADC)
- 36.1 Overview
- 36.2 Block Diagram
- 36.3 Signal Description
- 36.4 Product Dependencies
- 36.5 Functional Description
- 36.6 Analog-to-Digital Converter (ADC) User Interface
37. SAM7S Electrical Characteristics
- 37.1 Absolute Maximum Ratings
- 37.2 DC Characteristics
- 37.3 Power Consumption
  - 37.3.1 Power Consumption Versus Modes
  - 37.3.2 Peripheral Power Consumption in Active Mode
- 37.4 Crystal Oscillators Characteristics
- 37.5 PLL Characteristics
- 37.6 Master Clock Characteristics
- 37.7 I/O Characteristics
- 37.8 USB Transceiver Characteristics
  - 37.8.1 Electrical Characteristics
  - 37.8.2 Switching Characteristics
- 37.9 ADC Characteristics
- 37.10 AC Characteristics
38. Mechanical Characteristics
- 38.1 Package Drawings
- 38.2 LQFP Packages
- 38.3 QFN Packages
- 38.4 Soldering Profile
39. SAM7S Ordering Information
40. Errata
- 40.1 Marking
- 40.2 Errata Summary by Product and Revision or Manufacturing Number
- 40.3 Errata Organization by Product and Revision or Manufacturing Number
- 40.4 SAM7S512 Errata - Revision A Parts
  - 40.4.1 Analog-to-Digital Converter (ADC)
  - 40.4.2 Embedded Flash Controller (EFC)
    - 40.4.2.1 EFC: Embedded Flash Access Time 1
  - 40.4.3 Parallel Input/Output Controller (PIO)
  - 40.4.4 Pulse Width Modulation Controller (PWM)
  - 40.4.5 Real Time Timer (RTT)
    - 40.4.5.1 RTT: Possible Event Loss when Reading RTT_SR
  - 40.4.6 Serial Peripheral Interface (SPI)
  - 40.4.7 Synchronous Serial Controller (SSC)
  - 40.4.8 Two-wire Interface (TWI)
  - 40.4.9 Universal Synchronous Asynchronous Receiver Transmitter (USART)
- 40.5 SAM7S512 Errata - Revision B Parts
  - 40.5.1 Analog-to-Digital Converter (ADC)
  - 40.5.2 Embedded Flash Controller (EFC)
    - 40.5.2.1 EFC: Embedded Flash Access Time 2
  - 40.5.3 Parallel Input/Output Controller (PIO)
  - 40.5.4 Pulse Width Modulation Controller (PWM)
  - 40.5.5 Real Time Timer (RTT)
    - 40.5.5.1 RTT: Possible Event Loss when Reading RTT_SR
  - 40.5.6 Serial Peripheral Interface (SPI)
  - 40.5.7 Synchronous Serial Controller (SSC)
  - 40.5.8 Two-wire Interface (TWI)
  - 40.5.9 Universal Synchronous Asynchronous Receiver Transmitter (USART)
- 40.6 SAM7S256 Errata - Manufacturing Number 58818C
  - 40.6.1 Chip ID
    - 40.6.1.1 Wrong Chip ID Value
  - 40.6.2 Analog-to-Digital Converter (ADC)
  - 40.6.3 Master Clock (MCK)
    - 40.6.3.1 MCK: Limited Master Clock Frequency Ranges
  - 40.6.4 Non Volatile Memory Bits (NVM Bits)
    - 40.6.4.1 NVM Bits: Write/Erase Cycles Number
  - 40.6.5 Parallel Input/Output Controller (PIO)
  - 40.6.6 Power Management Controller (PMC)
    - 40.6.6.1 PMC: Slow Clock Selected in PMC and a Transition Occurs on PA1
    - 40.6.6.2 PMC: Programming CSS in PMC_MCKR Register
  - 40.6.7 Pulse Width Modulation Controller (PWM)
  - 40.6.8 Real Time Timer (RTT)
    - 40.6.8.1 RTT: Possible Event Loss when Reading RTT_SR
    - 40.6.8.2 RTT: RTT_VR May be Corrupted
  - 40.6.9 Serial Peripheral Interface (SPI)
  - 40.6.10 Synchronous Serial Controller (SSC)
  - 40.6.11 Two-wire Interface (TWI)
  - 40.6.12 Universal Synchronous Asynchronous Receiver Transmitter (USART)
  - 40.6.13 Voltage Regulator
    - 40.6.13.1 Voltage Regulator: Current Consumption in Deep Mode
    - 40.6.13.2 Voltage Regulator: Load Versus Temperature
  - 40.6.14 Watchdog Timer (WDT)
    - 40.6.14.1 WDT: The Watchdog Timer May Lock the Device in a Reset State
    - 40.6.14.2 WDT: The Watchdog Timer Status Register and Interrupt
- 40.7 SAM7S256 Errata - Revision A Parts
  - 40.7.1 Chip ID
    - 40.7.1.1 Wrong Chip ID Value
  - 40.7.2 Analog-to-Digital Converter (ADC)
  - 40.7.3 Non Volatile Memory Bits (NVM Bits)
    - 40.7.3.1 NVM Bits: Write/Erase Cycles Number
  - 40.7.4 Parallel Input/Output Controller (PIO)
  - 40.7.5 Power Management Controller (PMC)
    - 40.7.5.1 PMC: Slow Clock Selected in PMC and a Transition Occurs on PA1
    - 40.7.5.2 PMC: Programming CSS in PMC_MCKR Register
  - 40.7.6 Pulse Width Modulation Controller (PWM)
  - 40.7.7 Real Time Timer (RTT)
    - 40.7.7.1 RTT: Possible Event Loss when Reading RTT_SR
    - 40.7.7.2 RTT: RTT_VR May be Corrupted
  - 40.7.8 Serial Peripheral Interface (SPI)
  - 40.7.9 Synchronous Serial Controller (SSC)
  - 40.7.10 Two-wire Interface (TWI)
  - 40.7.11 Universal Synchronous Asynchronous Receiver Transmitter (USART)
  - 40.7.12 Voltage Regulator
    - 40.7.12.1 Voltage Regulator: Current Consumption in Deep Mode
    - 40.7.12.2 Voltage Regulator: Load Versus Temperature
  - 40.7.13 Watchdog Timer (WDT)
    - 40.7.13.1 WDT: The Watchdog Timer May Lock the Device in a Reset State
    - 40.7.13.2 WDT: The Watchdog Timer Status Register and Interrupt
- 40.8 SAM7S256 Errata - Revision B Parts
  - 40.8.1 Analog-to-Digital Converter (ADC)
  - 40.8.2 Non Volatile Memory Bits (NVM Bits)
    - 40.8.2.1 NVM Bits: Write/Erase Cycles Number
  - 40.8.3 Parallel Input/Output Controller (PIO)
    - 40.8.3.1 PIO: Electrical Characteristics on NRST and PA0-PA16 and PA21-31
    - 40.8.3.2 PIO: Drive Low NRST, PA0-PA16 and PA21-PA31
  - 40.8.4 Pulse Width Modulation Controller (PWM)
  - 40.8.5 Real Time Timer (RTT)
    - 40.8.5.1 RTT: Possible Event Loss when Reading RTT_SR
  - 40.8.6 Serial Peripheral Interface (SPI)
  - 40.8.7 Synchronous Serial Controller (SSC)
  - 40.8.8 Two-wire Interface (TWI)
  - 40.8.9 Universal Synchronous Asynchronous Receiver Transmitter (USART)
  - 40.8.10 Voltage Regulator
    - 40.8.10.1 Voltage Regulator: Current Consumption in Deep Mode
    - 40.8.10.2 Voltage Regulator: Load Versus Temperature
- 40.9 SAM7S256 Errata - Revision C Parts
  - 40.9.1 Embedded Flash Controller (EFC)
    - 40.9.1.1 EFC: Embedded Flash Access Time 1
  - 40.9.2 Parallel Input/Output Controller (PIO)
    - 40.9.2.1 PIO: Electrical Characteristics on NRST and PA0-PA16 and PA21-31
    - 40.9.2.2 PIO: Drive Low NRST, PA0-PA16 and PA21-PA31
  - 40.9.3 Pulse Width Modulation Controller (PWM)
  - 40.9.4 Real Time Timer (RTT)
    - 40.9.4.1 RTT: Possible Event Loss when Reading RTT_SR
  - 40.9.5 USART: Universal Synchronous Asynchronous Receiver Transmitter
    - 40.9.5.1 USART: DCD is active High instead of Low
- 40.10 SAM7S256 Errata - Revision D Parts
  - 40.10.1 Embedded Flash Controller (EFC)
    - 40.10.1.1 EFC: Embedded Flash Access Time 1
  - 40.10.2 Parallel Input/Output Controller (PIO)
    - 40.10.2.1 PIO: Electrical Characteristics on NRST and PA0-PA16 and PA21-31
    - 40.10.2.2 PIO: Drive Low NRST, PA0-PA16 and PA21-PA31
  - 40.10.3 Pulse Width Modulation Controller (PWM)
  - 40.10.4 Real Time Timer (RTT)
    - 40.10.4.1 RTT: Possible Event Loss when Reading RTT_SR
  - 40.10.5 USART: Universal Synchronous Asynchronous Receiver Transmitter
    - 40.10.5.1 USART: DCD is active High instead of Low
- 40.11 SAM7S128 Errata - Manufacturing Number 58818C
  - 40.11.1 Chip ID
    - 40.11.1.1 Wrong Chip ID Value
  - 40.11.2 Analog-to-Digital Converter (ADC)
  - 40.11.3 Master Clock (MCK)
    - 40.11.3.1 MCK: Limited Master Clock Frequency Ranges
  - 40.11.4 Non Volatile Memory Bits (NVM Bits)
    - 40.11.4.1 NVM Bits: Write/Erase Cycles Number
  - 40.11.5 Parallel Input/Output Controller (PIO)
  - 40.11.6 Power Management Controller (PMC)
    - 40.11.6.1 PMC: Slow Clock Selected in PMC and a Transition Occurs on PA1
    - 40.11.6.2 PMC: Programming CSS in PMC_MCKR Register
  - 40.11.7 Pulse Width Modulation Controller (PWM)
  - 40.11.8 Real Time Timer (RTT)
    - 40.11.8.1 RTT: Possible Event Loss when Reading RTT_SR
    - 40.11.8.2 RTT: RTT_VR May be Corrupted
  - 40.11.9 Serial Peripheral Interface (SPI)
  - 40.11.10 Synchronous Serial Controller (SSC)
  - 40.11.11 Two-wire Interface (TWI)
  - 40.11.12 USART: Universal Synchronous Asynchronous Receiver Transmitter
  - 40.11.13 Voltage Regulator
    - 40.11.13.1 Voltage Regulator: Current Consumption in Deep Mode
    - 40.11.13.2 Voltage Regulator: Load Versus Temperature
  - 40.11.14 Watchdog Timer (WDT)
    - 40.11.14.1 WDT: The Watchdog Timer May Lock the Device in a Reset State
    - 40.11.14.2 WDT: The Watchdog Timer Status Register and Interrupt
- 40.12 SAM7S128 Errata - Revision A Parts
  - 40.12.1 Chip ID
    - 40.12.1.1 Wrong Chip ID Value
  - 40.12.2 Analog-to-Digital Converter (ADC)
  - 40.12.3 Non Volatile Memory Bits (NVM Bits)
    - 40.12.3.1 NVM Bits: Write/Erase Cycles Number
  - 40.12.4 Parallel Input/Output Controller (PIO)
  - 40.12.5 Power Management Controller (PMC)
    - 40.12.5.1 PMC: Slow Clock Selected in PMC and a Transition Occurs on PA1
    - 40.12.5.2 PMC: Programming CSS in PMC_MCKR Register
  - 40.12.6 Pulse Width Modulation Controller (PWM)
  - 40.12.7 Real Time Timer (RTT)
    - 40.12.7.1 RTT: Possible Event Loss when Reading RTT_SR
    - 40.12.7.2 RTT: RTT_VR May be Corrupted
  - 40.12.8 Serial Peripheral Interface (SPI)
  - 40.12.9 Synchronous Serial Controller (SSC)
  - 40.12.10 Two-wire Interface (TWI)
  - 40.12.11 USART: Universal Synchronous Asynchronous Receiver Transmitter
  - 40.12.12 Voltage Regulator
    - 40.12.12.1 Voltage Regulator: Current Consumption in Deep Mode
    - 40.12.12.2 Voltage Regulator: Load Versus Temperature
  - 40.12.13 Watchdog Timer (WDT)
    - 40.12.13.1 WDT: The Watchdog Timer May Lock the Device in a Reset State
    - 40.12.13.2 WDT: The Watchdog Timer Status Register and Interrupt
- 40.13 SAM7S128 Errata - Revision B Parts
  - 40.13.1 Analog-to-Digital Converter (ADC)
  - 40.13.2 Non Volatile Memory Bits (NVM Bits)
    - 40.13.2.1 NVM Bits: Write/Erase Cycles Number
  - 40.13.3 Parallel Input/Output Controller (PIO)
    - 40.13.3.1 PIO: Electrical Characteristics on NRST and PA0-PA16 and PA21-31
    - 40.13.3.2 PIO: Drive Low NRST, PA0-PA16 and PA21-PA31
  - 40.13.4 Pulse Width Modulation Controller (PWM)
  - 40.13.5 Real Time Timer (RTT)
    - 40.13.5.1 RTT: Possible Event Loss when Reading RTT_SR
  - 40.13.6 Serial Peripheral Interface (SPI)
  - 40.13.7 Synchronous Serial Controller (SSC)
  - 40.13.8 Two-wire Interface (TWI)
  - 40.13.9 USART: Universal Synchronous Asynchronous Receiver Transmitter
  - 40.13.10 Voltage Regulator
    - 40.13.10.1 Voltage Regulator: Current Consumption in Deep Mode
    - 40.13.10.2 Voltage Regulator: Load Versus Temperature
- 40.14 SAM7S128 Errata - Revision C Parts
  - 40.14.1 Embedded Flash Controller (EFC)
    - 40.14.1.1 EFC: Embedded Flash Access Time 1
  - 40.14.2 Parallel Input/Output Controller (PIO)
    - 40.14.2.1 PIO: Electrical Characteristics on NRST and PA0-PA16 and PA21-31
    - 40.14.2.2 PIO: Drive Low NRST, PA0-PA16 and PA21-PA31
  - 40.14.3 Pulse Width Modulation Controller (PWM)
  - 40.14.4 Real Time Timer (RTT)
    - 40.14.4.1 RTT: Possible Event Loss when Reading RTT_SR
  - 40.14.5 USART: Universal Synchronous Asynchronous Receiver Transmitter
    - 40.14.5.1 USART: DCD is active High instead of Low
- 40.15 SAM7S128 Errata - Revision D Parts
  - 40.15.1 Embedded Flash Controller (EFC)
    - 40.15.1.1 EFC: Embedded Flash Access Time 1
  - 40.15.2 Parallel Input/Output Controller (PIO)
    - 40.15.2.1 PIO: Electrical Characteristics on NRST and PA0-PA16 and PA21-31
    - 40.15.2.2 PIO: Drive Low NRST, PA0-PA16 and PA21-PA31
  - 40.15.3 Pulse Width Modulation Controller (PWM)
  - 40.15.4 Real Time Timer (RTT)
    - 40.15.4.1 RTT: Possible Event Loss when Reading RTT_SR
  - 40.15.5 USART: Universal Synchronous Asynchronous Receiver Transmitter
    - 40.15.5.1 USART: DCD is active High instead of Low
- 40.16 SAM7S64 Errata - Manufacturing Number 58814G
  - 40.16.1 Analog-to-Digital Converter (ADC)
  - 40.16.2 JTAG
    - 40.16.2.1 JTAG: Recommendation for TDI Pin
  - 40.16.3 Master Clock (MCK)
    - 40.16.3.1 MCK: Limited Master Clock Frequency Ranges
  - 40.16.4 Non Volatile Memory Bits (NVM Bits)
    - 40.16.4.1 NVM Bits: Write/Erase Cycles Number
  - 40.16.5 Parallel Input/Output Controller (PIO)
  - 40.16.6 Pulse Width Modulation Controller (PWM)
  - 40.16.7 Real Time Timer (RTT)
    - 40.16.7.1 RTT: Possible Event Loss when Reading RTT_SR
  - 40.16.8 Serial Peripheral Interface (SPI)
  - 40.16.9 Synchronous Serial Controller (SSC)
  - 40.16.10 Two-wire Interface (TWI)
  - 40.16.11 Universal Synchronous Asynchronous Receiver Transmitter (USART)
  - 40.16.12 Voltage Regulator
    - 40.16.12.1 Voltage Regulator: Current Consumption in Deep Mode
    - 40.16.12.2 Voltage Regulator: Load Versus Temperature
- 40.17 SAM7S64 Errata - Revision A Parts
  - 40.17.1 Analog-to-Digital Converter (ADC)
  - 40.17.2 Non Volatile Memory Bits (NVM Bits)
    - 40.17.2.1 NVM Bits: Write/Erase Cycles Number
  - 40.17.3 Parallel Input/Output Controller (PIO)
  - 40.17.4 Pulse Width Modulation Controller (PWM)
  - 40.17.5 Real Time Timer (RTT)
    - 40.17.5.1 RTT: Possible Event Loss when Reading RTT_SR
  - 40.17.6 Serial Peripheral Interface (SPI)
  - 40.17.7 Synchronous Serial Controller (SSC)
  - 40.17.8 Two-wire Interface (TWI)
  - 40.17.9 Universal Synchronous Asynchronous Receiver Transmitter (USART)
  - 40.17.10 Voltage Regulator
    - 40.17.10.1 Voltage Regulator: Current Consumption in Deep Mode
    - 40.17.10.2 Voltage Regulator: Load Versus Temperature
- 40.18 SAM7S64 Errata - Revision B Parts
  - 40.18.1 Analog-to-Digital Converter (ADC)
  - 40.18.2 Non Volatile Memory Bits (NVM Bits)
    - 40.18.2.1 NVM Bits: Write/Erase Cycles Number
  - 40.18.3 Parallel Input/Output Controller (PIO)
    - 40.18.3.1 PIO: Electrical Characteristics on NRST and PA0-PA16 and PA21-31
    - 40.18.3.2 PIO: Drive Low NRST, PA0-PA16 and PA21-PA31
  - 40.18.4 Pulse Width Modulation Controller (PWM)
  - 40.18.5 Real Time Timer (RTT)
    - 40.18.5.1 RTT: Possible Event Loss when Reading RTT_SR
  - 40.18.6 Serial Peripheral Interface (SPI)
  - 40.18.7 Synchronous Serial Controller (SSC)
  - 40.18.8 Two-wire Interface (TWI)
  - 40.18.9 Universal Synchronous Asynchronous Receiver Transmitter (USART)
  - 40.18.10 Voltage Regulator
    - 40.18.10.1 Voltage Regulator: Current Consumption in Deep Mode
    - 40.18.10.2 Voltage Regulator: Load Versus Temperature
- 40.19 SAM7S64 Errata - Revision C Parts
  - 40.19.1 Parallel Input/Output Controller (PIO)
    - 40.19.1.1 PIO: Electrical Characteristics on NRST and PA0-PA16 and PA21-31
    - 40.19.1.2 PIO: Drive Low NRST, PA0-PA16 and PA21-PA31
  - 40.19.2 Pulse Width Modulation Controller (PWM)
  - 40.19.3 Real Time Timer (RTT)
    - 40.19.3.1 RTT: Possible Event Loss when Reading RTT_SR
- 40.20 SAM7S321 Errata - Revision A Parts
  - 40.20.1 Analog-to-Digital Converter (ADC)
  - 40.20.2 Parallel Input/Output Controller (PIO)
    - 40.20.2.1 PIO: Electrical Characteristics on NRST and PA0-PA16 and PA21-31
    - 40.20.2.2 PIO: Drive Low NRST, PA0-PA16 and PA21-PA31
  - 40.20.3 Pulse Width Modulation Controller (PWM)
  - 40.20.4 Real Time Timer (RTT)
    - 40.20.4.1 RTT: Possible Event Loss when Reading RTT_SR
  - 40.20.5 Serial Peripheral Interface (SPI)
  - 40.20.6 Synchronous Serial Controller (SSC)
  - 40.20.7 Two-wire Interface (TWI)
  - 40.20.8 Universal Synchronous Asynchronous Receiver Transmitter (USART)
- 40.21 SAM7S32 Errata - Manufacturing Number 58814G
  - 40.21.1 Analog-to-Digital Converter (ADC)
  - 40.21.2 JTAG
    - 40.21.2.1 JTAG: Recommendation for TDI Pin
  - 40.21.3 Master Clock (MCK)
    - 40.21.3.1 MCK: Limited Master Clock Frequency Ranges
  - 40.21.4 Non Volatile Memory Bits (NVM Bits)
    - 40.21.4.1 NVM Bits: Write/Erase Cycles Number
  - 40.21.5 Parallel Input/Output Controller (PIO)
  - 40.21.6 Pulse Width Modulation Controller (PWM)
  - 40.21.7 Serial Peripheral Interface (SPI)
  - 40.21.8 Synchronous Serial Controller (SSC)
  - 40.21.9 Two-wire Interface (TWI)
  - 40.21.10 Universal Synchronous Asynchronous Receiver Transmitter (USART)
  - 40.21.11 Voltage Regulator
    - 40.21.11.1 Voltage Regulator: Current Consumption in Deep Mode
    - 40.21.11.2 Voltage Regulator: Load Versus Temperature
- 40.22 SAM7S32 Errata - Revision A Parts
  - 40.22.1 Analog-to-Digital Converter (ADC)
  - 40.22.2 Non Volatile Memory Bits (NVM Bits)
    - 40.22.2.1 NVM Bits: Write/Erase Cycles Number
  - 40.22.3 Parallel Input/Output Controller (PIO)
  - 40.22.4 Pulse Width Modulation Controller (PWM)
  - 40.22.5 Real Time Timer (RTT)
    - 40.22.5.1 RTT: Possible Event Loss when Reading RTT_SR
  - 40.22.6 Serial Peripheral Interface (SPI)
  - 40.22.7 Synchronous Serial Controller (SSC)
  - 40.22.8 Two-wire Interface (TWI)
  - 40.22.9 Universal Synchronous Asynchronous Receiver Transmitter (USART)
  - 40.22.10 Voltage Regulator
    - 40.22.10.1 Voltage Regulator: Current Consumption in Deep Mode
    - 40.22.10.2 Voltage Regulator: Load Versus Temperature
- 40.23 SAM7S32 Errata - Revision B Parts
  - 40.23.1 Analog-to-Digital Converter (ADC)
  - 40.23.2 Parallel Input/Output Controller (PIO)
    - 40.23.2.1 PIO: Electrical Characteristics on NRST and PA0-PA16 and PA21-31
    - 40.23.2.2 PIO: Drive Low NRST, PA0-PA16 and PA21-PA31
  - 40.23.3 Pulse Width Modulation Controller (PWM)
  - 40.23.4 Real Time Timer (RTT)
    - 40.23.4.1 RTT: Possible Event Loss when Reading RTT_SR
  - 40.23.5 Serial Peripheral Interface (SPI)
  - 40.23.6 Synchronous Serial Controller (SSC)
  - 40.23.7 Two-wire Interface (TWI)
  - 40.23.8 Universal Synchronous Asynchronous Receiver Transmitter (USART)
- 40.24 SAM7S161 Errata - Revision A Parts
  - 40.24.1 Analog-to-Digital Converter (ADC)
  - 40.24.2 Pulse Width Modulation Controller (PWM)
  - 40.24.3 Real Time Timer (RTT)
    - 40.24.3.1 RTT: Possible Event Loss when Reading RTT_SR
  - 40.24.4 Serial Peripheral Interface (SPI)
    - 40.24.4.1 SPI: Bad Serial Clock Generation on 2nd Chip Select
  - 40.24.5 Synchronous Serial Controller (SSC)
  - 40.24.6 Universal Synchronous Asynchronous Receiver Transmitter (USART)
    - 40.24.6.1 USART: DCD is active High instead of Low
- 40.25 SAM7S16 Errata - Revision A Parts
  - 40.25.1 Analog-to-Digital Converter (ADC)
  - 40.25.2 Pulse Width Modulation Controller (PWM)
  - 40.25.3 Real Time Timer (RTT)
    - 40.25.3.1 RTT: Possible Event Loss when Reading RTT_SR
  - 40.25.4 Serial Peripheral Interface (SPI)
    - 40.25.4.1 SPI: Bad Serial Clock Generation on 2nd Chip Select
  - 40.25.5 Synchronous Serial Controller (SSC)
  - 40.25.6 Universal Synchronous Asynchronous Receiver Transmitter (USART)
    - 40.25.6.1 USART: DCD is active High instead of Low
Revision History
Table of Contents

757

SAM7S Series [DATASHEET]

6175M–ATARM–26-Oct-12

Version

6175H Comments

Change

Request

Ref.

Overview:

“Features” on page 1 (and all of datasheet) Added AT91SAM7S16/161 to product family.

See: Table 1-1, “Configuration Summary,” on page 3

Section 8.6 “SAM7S161/16” on page 19.

rfo

Section 9.5 ”Debug Unit” Chip ID updated. 4325

Section 6. ”I/O Lines Considerations”, JTAG Port Pin, Test Pin, Erase Pin, updated. 5063

ADC: Section 36.6.2 ”ADC Mode Register”, STARTUP and PRESCAL bitfields updated (width expanded).

AIC: Section 23.8.15 ”AIC Spurious Interrupt Vector Register”, bitfield typo corrected 4749

Debug and Test:

Table 12-2, “SAM7S Series Debug Unit Chip ID,” on page 51, updated.

Table 12.5.5, “ID Code Register,” on page 56, updated.

4325/rfo

EFC: Section 19.3.3 ”MC Flash Status Register” GPNVM2 removed from bit field 10. 4464

FFPI:

Table 20-6, Table 20-7 plus Table 20-8, Table plus Table 20-17, Table 20-18 and Table 20-20 updated

Global update to terms listed below: ≥

Fuse → GPNVM

SFB → SGPB

CFB → CGPB

GFB → GGPB

Section 20.2.5.6 on page 133 &Section 20.3.4.6 on page 141, security bit restraint on access to FFPI explained

4410

3933

4744

PIO:

Section 27.4.5 ”Synchronous Data Output”, typo fixed on PIO_OWSR

PIO User Interface, Table 27-2, “Register Mapping” updates to footnotes, PIO_PSR, PIO_ODSR, PIO_PDSR

3289

3974

PMC: Figure 24-2 ”Typical Crystal Connection” updated 3861

SPI: Section 28.6.4 ”SPI Slave Mode”, Corrected information on OVRES (SPI_SR) and data read in SPI_RDR. 3943

SSC: “SSC Receive Clock Mode Register” on page 426, typo corrected in STTDLY bit field. 4478

TC: Section 33.6 ”Timer Counter (TC) User Interface”, register mapping consolidated in Table 33-4 on page

463 and register offsets indexed. Section 33.6.3 on page 466 to Section 33.6.13 on page 480, register names

upd

ated with ind

exed offset.

Section 33.6.4 ”TC Channel Mode Register: Capture Mode”, bit field 15 and WAVE bit field description updated.

4583

TWI:

Section 29. ”Two-wire Interface (TWI) SAM7S512/256/128/64/321/32”, section has been updated.

Important changes to this datasheet include a clarification of Atmel TWI compatibility with I2C Standard.

Section 30. ”Two Wire Interface (TWI) SAM7S161/16”, section added specific to the TWI implementation on the

AT91SAM7S16/161 devices.

4247

rfo

PWM:

Section 34.6 ”Pulse Width Modulation Controller (PWM) User Interface”, in the Offset column in Table 34-2,

“Register Mapping”, the PWM channel-dependent registers are indexed. See also, PWM Channel registers

from: Section 34.6.10 on page 497 to Section 34.6.13 on page 499.

4486