Datasheet
Table Of Contents
- 1. Description
- 2. About Code Examples
- 3. AVR CPU Core
- 4. Memories
- 5. System Clock
- 6. Power Management and Sleep Modes
- 7. System Control and Reset
- 8. Interrupts
- 9. I/O-Ports
- 10. External Interrupts
- 11. Timer/Counter3/1/0 Prescalers
- 12. 8-bit Timer/Counter0 with PWM
- 13. 16-bit Timer/Counter (Timer/Counter1 and Timer/Counter3)
- 14. 8-bit Timer/Counter2 with PWM and Asynchronous Operation
- 14.1 Features
- 14.2 Overview
- 14.3 Timer/Counter Clock Sources
- 14.4 Counter Unit
- 14.5 Output Compare Unit
- 14.6 Compare Match Output Unit
- 14.7 Modes of Operation
- 14.8 Timer/Counter Timing Diagrams
- 14.9 8-bit Timer/Counter Register Description
- 14.10 Asynchronous operation of the Timer/Counter2
- 14.11 Timer/Counter2 Prescaler
- 15. Output Compare Modulator - OCM
- 16. Serial Peripheral Interface - SPI
- 17. USART (USART0 and USART1)
- 17.1 Features
- 17.2 Overview
- 17.3 Dual USART
- 17.4 Clock Generation
- 17.5 Serial Frame
- 17.6 USART Initialization
- 17.7 Data Transmission - USART Transmitter
- 17.8 Data Reception - USART Receiver
- 17.9 Asynchronous Data Reception
- 17.10 Multi-processor Communication Mode
- 17.11 USART Register Description
- 17.12 Examples of Baud Rate Setting
- 18. Two-wire Serial Interface
- 19. Controller Area Network - CAN
- 20. Analog Comparator
- 21. Analog to Digital Converter - ADC
- 22. JTAG Interface and On-chip Debug System
- 23. Boundary-scan IEEE 1149.1 (JTAG)
- 24. Boot Loader Support - Read-While-Write Self-Programming
- 25. Memory Programming
- 26. Electrical Characteristics (1)
- 26.1 Absolute Maximum Ratings*
- 26.2 DC Characteristics
- 26.3 External Clock Drive Characteristics
- 26.4 Maximum Speed vs. VCC
- 26.5 Two-wire Serial Interface Characteristics
- 26.6 SPI Timing Characteristics
- 26.7 CAN Physical Layer Characteristics
- 26.8 ADC Characteristics
- 26.9 External Data Memory Characteristics
- 26.10 Parallel Programming Characteristics
- 27. Decoupling Capacitors
- 28. AT90CAN32/64/128 Typical Characteristics
- 28.1 Active Supply Current
- 28.2 Idle Supply Current
- 28.3 Power-down Supply Current
- 28.4 Power-save Supply Current
- 28.5 Standby Supply Current
- 28.6 Pin Pull-up
- 28.7 Pin Driver Strength
- 28.8 Pin Thresholds and Hysteresis
- 28.9 BOD Thresholds and Analog Comparator Offset
- 28.10 Internal Oscillator Speed
- 28.11 Current Consumption of Peripheral Units
- 28.12 Current Consumption in Reset and Reset Pulse Width
- 29. Register Summary
- 30. Instruction Set Summary
- 31. Ordering Information
- 32. Packaging Information
- 33. Errata
- 34. Datasheet Revision History for AT90CAN32/64/128
- 34.1 Changes from 7679G - 03/08 to 7679H - 08/08
- 34.2 Changes from 7679F - 11/07 to 7679G - 03/08
- 34.3 Changes from 7679E - 07/07 to 7679F - 11/07
- 34.4 Changes from 7679D - 02/07 to 7679E - 07/07
- 34.5 Changes from 7679C - 01/07 to 7679D - 02/07
- 34.6 Changes from 7679B - 11/06 to 7679C - 01/07
- 34.7 Changes from 7679A - 10/06 to 7679B - 11/06
- 34.8 Document Creation

185
7679H–CAN–08/08
AT90CAN32/64/128
17.7.2 Sending Frames with 9 Data Bit
If 9-bit characters are used (UCSZn = 7), the ninth bit must be written to the TXB8n bit in UCS-
RnB before the low byte of the character is written to UDRn. The following code examples show
a transmit function that handles 9-bit characters. For the assembly code, the data to be sent is
assumed to be stored in registers R17:R16.
Notes: 1. These transmit functions are written to be general functions. They can be optimized if the con-
tents of the UCSR0B is static. For example, only the TXB80 bit of the UCSRB0 Register is
used after initialization.
2. The example code assumes that the part specific header file is included.
The ninth bit can be used for indicating an address frame when using multi processor communi-
cation mode or for other protocol handling as for example synchronization.
17.7.3 Transmitter Flags and Interrupts
The USARTn Transmitter has two flags that indicate its state: USART Data Register Empty
(UDREn) and Transmit Complete (TXCn). Both flags can be used for generating interrupts.
Assembly Code Example
(1)(2)
USART0_Transmit:
; Wait for empty transmit buffer
lds r18, UCSR0A
sbrs r18, UDRE0
rjmp USART0_Transmit
; Copy 9th bit from r17-bit0 to TXB80 via T-bit of SREG
lds r18, UCSR0B
bst r17, 0
bld r18, TXB80
sts UCSR0B, r18
; Put LSB data (r16) into buffer, sends the data
sts UDR0, r16
ret
C Code Example
(1)(2)
void USART0_Transmit (unsigned int data)
{
/* Wait for empty transmit buffer */
while ( !( UCSR0A & (1<<UDRE0)));
/* Copy 9th bit to TXB8 */
UCSR0B &= ~(1<<TXB80);
if ( data & 0x0100 )
UCSR0B |= (1<<TXB80);
/* Put data into buffer, sends the data */
UDR0 = data;
}