Datasheet

6
3286P–MICRO–3/10
AT89S8253
3.13 EA/VPP
External Access Enable. EA must be strapped to GND in order to enable the device to fetch
code from external program memory locations starting at 0000H up to FFFFH. Note, however,
that if lock bit 1 is programmed, EA
will be internally latched on reset.
EA
should be strapped to V
CC
for internal program executions. This pin also receives the 12-volt
programming enable voltage (V
PP
) during Flash programming when 12-volt programming is
selected.
3.14 XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
3.15 XTAL2
Output from the inverting oscillator amplifier. XTAL2 should not drive a board-level clock without
a buffer.
4. Block Diagram
PORT 2 DRIVERS
PORT 2
LATCH
P2.0 - P2.7
FLASH
PORT 0
LATCH
RAM
EEPROM
PROGRAM
ADDRESS
REGISTER
BUFFER
PC
INCREMENTER
PROGRAM
COUNTER
DUAL
DPTR
INSTRUCTION
REGISTER
B
REGISTER
INTERRUPT, SERIAL PORT,
AND TIMER BLOCKS
STACK
POINTER
ACC
TMP2 TMP1
ALU
PSW
TIMING
AND
CONTROL
PORT 1 DRIVERS
P1.0 - P1.7
PORT 3
LATCH
PORT 3 DRIVERS
P3.0 - P3.7
OSC
GND
V
CC
PSEN
ALE/PROG
EA / V
PP
RST
RAM ADDR.
REGISTER
PORT 0 DRIVERS
P0.0 - P0.7
PORT 1
LATCH
WATCH
DOG
SPI
PORT
PROGRAM
LOGIC