Datasheet

48
3286P–MICRO–3/10
AT89S8253
31. AC Characteristics
The values shown in this table are valid for T
A
= -40°C to 85°C and V
CC
= 2.7 to 5.5V, unless otherwise noted.
Under operating conditions, load capacitance for Port 0, ALE/PROG
, and PSEN = 100 pF; load capacitance for all other
outputs = 80 pF.
31.1 External Program and Data Memory Characteristics
Symbol Parameter
Variable Oscillator
UnitsMin Max
1/t
CLCL
Oscillator Frequency 0 24 MHz
t
LHLL
ALE Pulse Width 2t
CLCL
- 12 ns
t
AVLL
Address Valid to ALE Low t
CLCL
- 12 ns
t
LLAX
Address Hold after ALE Low t
CLCL
- 16 ns
t
LLIV
ALE Low to Valid Instruction In 4t
CLCL
- 50 ns
t
LLPL
ALE Low to PSEN Low t
CLCL
- 12 ns
t
PLPH
PSEN Pulse Width 3t
CLCL
- 12 ns
t
PLIV
PSEN Low to Valid Instruction In 3t
CLCL
- 50 ns
t
PXIX
Input Instruction Hold after PSEN -10 ns
t
PXIZ
Input Instruction Float after PSEN t
CLCL
- 20 ns
t
PXAV
PSEN to Address Valid t
CLCL
- 4 ns
t
AVIV
Address to Valid Instruction In 5t
CLCL
- 50 ns
t
PLAZ
PSEN Low to Address Float 20 ns
t
RLRH
RD Pulse Width 6t
CLCL
ns
t
WLWH
WR Pulse Width 6t
CLCL
ns
t
RLDV
RD Low to Valid Data In 5t
CLCL
- 50 ns
t
RHDX
Data Hold after RD 0ns
t
RHDZ
Data Float after RD 2t
CLCL
- 20 ns
t
LLDV
ALE Low to Valid Data In 8t
CLCL
- 50 ns
t
AVDV
Address to Valid Data In 9t
CLCL
- 50 ns
t
LLWL
ALE Low to RD or WR Low 3t
CLCL
- 24 3t
CLCL
ns
t
AVWL
Address to RD or WR Low 4t
CLCL
- 12 ns
t
QVWX
Data Valid to WR Transition 2t
CLCL
- 24 ns
t
QVWH
Data Valid to WR High 8t
CLCL
- 24 ns
t
WHQX
Data Hold after WR 2t
CLCL
- 24 ns
t
RLAZ
RD Low to Address Float 0ns
t
WHLH
RD or WR High to ALE High t
CLCL
- 10 t
CLCL
+ 20 ns
t
WHAX
Address Hold after RD or WR High t
CLCL
- 10 ns