Datasheet

Table 3-1. Output Configuration

Name (Vop) Function (Output Polarity)

Vss Active high

Vdd Active low

Note: Some devices, such as Digital Transistors, have an internal biasing network that will naturally pull

the OUT pin to its inactive state. If these are being used then the resistor Rop is not required (see Figure

3-5).

Figure 3-5. Output Connected to Digital Transistor (6-pin SOT23)

Load

VDD

OUT

VSS

SNSK

TIME

SNS

SENSE

ELECTRODE

VDD

Cby

100 nF

3.10 Output Drive

The OUT pin can sink or source up to 2 mA. When a large value of Cs (>20 nF) is used the OUT current

should be limited to <1 mA to prevent gain-shifting side effects, which happen when the load current

creates voltage drops on the die and bonding wires; these small shifts can materially influence the signal

level to cause detection instability.

3.11 Auto-Off Delay

3.11.1 Introduction

In addition to toggling the output on/off with a key touch, the QT1012 can automatically switch the output

off after a time, typically ±10 percent of the nominal stated time. This feature can be used to save power

in situations where the switched device could be left on inadvertently.

The QT1012 has:

• three predefined delay times (Section 3.11.2)

• the ability to set a user-programmed delay (Section 3.11.3)

• the ability to override the auto-off delay (Section 3.11.5)

AT42QT1012

Datasheet

DS40001948A-page 13