Datasheet

999
32117D–AVR-01/12
AT32UC3C
33.7.2 Enable Register
Name:
ENA
Access Type: Write-only
Offset: 0x004
Reset Value: -
• CHIDx: Channel ID
Writing a zero to this bit has no effect.
Writing a one to this bit will enable the PWM output for channel x.
31 30 29 28 27 26 25 24
- -------
23 22 21 20 19 18 17 16
--------
15 14 13 12 11 10 9 8
––––––––
76543210
– – – – CHID3 CHID2 CHID1 CHID0