Datasheet

987
32117D–AVR-01/12
AT32UC3C
33.6.3 PWM Comparison Units
The PWM provides 8 independent comparison units able to compare a programmed value with
the current value of the channel 0 counter (which is the channel counter of all synchronous
channels, Section 33.6.2.7 on page 979). These comparisons are intended to generate pulses
on the event lines (used to synchronize ADC, see Section 33.6.4 on page 989), to generate soft-
ware interrupts and to trigger PDCA transfer requests for the synchronous channels (see
Section 33.6.2.10 on page 984).
Figure 33-14. Comparison Unit Block Diagram
The comparison x matches when it is enabled by the CEN bit in the ”Comparison x Mode Regis-
ter” on page 1034 (CMPxM for the comparison x) and when the counter of the channel 0
reaches the comparison value defined by the CV field in ”Comparison x Value Register” on page
1032 (CMPxV for the comparison x). If the counter of the channel 0 is center aligned (CALG=1 in
”Channel Mode Register” on page 1036), the CVM bit (in CMPxV) defines if the comparison is
made when the counter is counting up or counting down (in left alignment mode CALG=0, this
bit is useless).
If a fault is active on the channel 0, the comparison is disabled and cannot match (see Section
33.6.2.6 on page 977).
The user can define the periodicity of the comparison x by the CTR and CPR fields (in CMPxV).
The comparison is performed periodically once every CPR+1 periods of the counter of the chan-
nel 0, when the value of the comparison period counter CPRCNT (in CMPxM) reaches the value
defined by CTR. CPR is the maximum value of the comparison period counter CPRCNT. If
CPR=CTR=0, the comparison is performed at each period of the counter of the channel 0.
The comparison x configuration can be modified while the channel 0 is enabled by using the
”PWM Comparison x Mode Update Register” on page 1035 (CMPxMUPD registers for the com-
parison x). In the same way, the comparison x value can be modified while the channel 0 is
enabled by using the ”Comparison x Value Update Register” on page 1033 (CMPxVUPD regis-
ters for the comparison x).
=
fault on channel 0
CNT [PWM_CCNT0]
CNT [PWM_CCNT0] is decrementing
CALG [PWM_CMR0]
CV [PWM_CMPxV]
=
1
0
1
Comparison x
CVM [PWM_CMPxV]
=
CPRCNT [PWM_CMPxM]
CTR [PWM_CMPxM]
CEN [PWM_CMPxM]