Datasheet

971
32117D–AVR-01/12
AT32UC3C
33.6.2.2 Comparator
The comparator continuously compares its counter value with the channel period defined by
CPRD in the ”Channel Period Register” on page 1040 (CPRDx) and the duty-cycle defined by
CDTY in the ”Channel Duty Cycle Register” on page 1038 (CDTYx) to generate an output signal
OCx accordingly.
The different properties of the waveform of the output OCx are:
• the clock selection. The channel counter is clocked by one of the clocks provided by the
clock generator described in the previous section. This channel parameter is defined in the
CPRE field of the ”Channel Mode Register” on page 1036 (CMRx). This field is reset at 0.
• the waveform period. This channel parameter is defined in the CPRD field of the CPRDx
register.
- If the waveform is left aligned, then the output waveform period depends on the counter
source clock and can be calculated:
By using the PWM internal clock (CCK) divided by an X given prescaler value (with X being 1,
2, 4, 8, 16, 32, 64, 128, 256, 512, or 1024), the resulting period formula will be:
By using the PWM internal clock (CCK) divided by one of both DIVA or DIVB divider, the
formula becomes, respectively:
or
If the waveform is center aligned then the output waveform period depends on the counter
source clock and can be calculated:
By using the PWM internal clock (CCK) divided by an X given prescaler value
(with X being 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, or 1024). The resulting period formula will
be:
By using the PWM internal clock (CCK) divided by one of both DIVA or DIVB divider, the
formula becomes, respectively:
or
• the waveform duty-cycle. This channel parameter is defined in the CDTY field of the CDTYx
register.
If the waveform is left aligned then:
If the waveform is center aligned, then:
XCPRD×()
CCK
-------------------------------
CRPD DIVA×()
CCK
------------------------------------------
CRPD DIVB×()
CCK
------------------------------------------
2 X CPRD××()
CCK
---------------------------------------- -
2 CPRD DIVA××()
CCK
--------------------------------------------------- -
2 CPRD× DIVB×()
CCK
--------------------------------------------------- -
duty cycle
period 1 fchannel_x_clock CDTY×⁄–()
period
------------------------------------------------------------------------------------------------------- -=
duty cycle
period 2⁄()1 fchannel_x_clock CDTY×⁄–())
period 2⁄()
---------------------------------------------------------------------------------------------------------------------- -=