Datasheet
909
32117D–AVR-01/12
AT32UC3C
• STOI: Suspend Time-Out Interrupt
This bit is cleared when the USBSTACLR.STOIC bit is written to one.
This bit is set when a time-out error (more than 200ms) has been detected after a suspend. This triggers a USB interrupt if
STOE is one.
This bit should only be used in host mode.
• HNPERRI: HNP Error Interrupt
This bit is cleared when the USBSTACLR.HNPERRIC bit is written to one.
This bit is set when an error has been detected during a HNP negotiation. This triggers a USB interrupt if HNPERRE is one.
This bit should only be used in device mode.
• ROLEEXI: Role Exchange Interrupt
This bit is cleared when the USBSTACLR.ROLEEXIC bit is written to one.
This bit is set when the USBC has successfully switched its mode because of an HNP negotiation (host to device or device to
host). This triggers a USB interrupt if ROLEEXE is one.
• BCERRI: B-Connection Error Interrupt
This bit is cleared when the USBSTACLR.BCERRIC bit is written to one.
This bit is set when an error occurs during the B-connection. This triggers a USB interrupt if BCERRE is one.
This bit should only be used in host mode.
• VBERRI: VBUS Error Interrupt
This bit is cleared when the USBSTACLR.VBERRIC bit is written to one.
This bit is set when a VBUS drop has been detected. This triggers a USB interrupt if VBERRE is one.
This bit should only be used in host mode.
• SRPI: SRP Interrupt
This bit is cleared when the USBSTACLR.SRPIC bit is written to one.
This bit is set when an SRP has been detected. This triggers a USB interrupt if SRPE is one.
This bit should only be used in host mode.
• VBUSTI: VBUS Transition Interrupt
This bit is cleared when the USBSTACLR.VBUSTIC bit is written to one.
This bit is set when a transition (high to low, low to high) has been detected on the USB_VBUS pad. This triggers a USB
interrupt if VBUSTE is one.
This interrupt is generated even if the clock is frozen by the FRZCLK bit.
• IDTI: ID Transition Interrupt
This bit is cleared when the USBSTACLR.IDTIC bit is written to one.
This bit is set when a transition (high to low, low to high) has been detected on the USB_ID input pin. This triggers a USB
interrupt if IDTE is one.
This interrupt is generated even if the clock is frozen by the FRZCLK bit.