Datasheet

83
32117D–AVR-01/12
AT32UC3C
8.4.2 Interrupt
The SCIF interrupt line is connected to one of the internal sources of the interrupt controller.
Using the SCIF interrupt requires the interrupt controller to be programmed first.
8.4.3 Debug Operation
The SCIF module does not interact with debug operations.
8.4.4 Clocks
The SCIF controls all oscillators on the part. Those oscillators can then be used as sources for
for generic clocks (handled by the SCIF) and for the CPU and peripherals (in this case, selection
of source is done by the Power Manager).
8.5 Functional Description
8.5.1 Oscillator Operation
The main oscillator is designed to be used with an external 0.4 to 20MHz crystal and two biasing
capacitors, as shown in Figure 8-1. The oscillator can be used for the main clock in the device,
as described in the Power Manager chapter. The oscillator can be used as source for the
generic clocks, as described in ”Generic Clocks” on page 85.
The oscillator is disabled by default after reset. When the oscillator is disabled, the XIN and
XOUT pins can be used as general purpose I/Os. When the oscillator is enabled, the XIN and
XOUT pins are controlled directly by the SCIF. When the oscillator is configured to use an exter-
nal clock, the clock must be applied to the XIN pin while the XOUT pin can be used as a general
purpose I/O.
The oscillator can be enabled by writing a one to the OSCEN bit in OSCCTRLn. Operation mode
(external clock or crystal) is chosen by writing to the MODE field in OSCCTRLn. The oscillator is
automatically switched off in certain sleep modes to reduce power consumption, as described in
the Power Manager chapter.
After a hard reset, or when waking up from a sleep mode that disabled the oscillator, the oscilla-
tor may need a certain amount of time to stabilize on the correct frequency. This start-up time
can be set in the OSCCTRLn register.
The SCIF masks the oscillator outputs during the start-up time, to ensure that no unstable clocks
propagate to the digital logic. The OSCnRDY bits in PCLKSR are automatically set and cleared
according to the status of the oscillators. A zero to one transition on these bits can also be con-
figured to generate an interrupt, as described in ”Interrupts” on page 89.