Datasheet

648
32117D–AVR-01/12
AT32UC3C
25.7.16 LIN Mode Register
Name: LINMR
Access Type: Read-write
Offset: 0x54
Reset Value: 0x00000000
•
SYNCDIS: Synchronization Disable
0: The Synchronization procedure is performed in LIN Slave node configuration.
1: The Synchronization procedure is not performed.
• PDCM: Peripheral DMA Controller Mode
0: The LIN mode register LINMR is not written by the Peripheral DMA Controller.
1: The LIN mode register LINMR (excepting that bit) is written by the Peripheral DMA Controller.
• DLC: Data Length Control
0 - 255: Defines the response data length if DLM=0,in that case the response data length is equal to DLC+1 bytes.
• WKUPTYP: Wakeup Signal Type
0: setting the bit LINWKUP in the control register sends a LIN 2.0 wakeup signal.
1: setting the bit LINWKUP in the control register sends a LIN 1.3 wakeup signal.
• FSDIS: Frame Slot Mode Disable
0: The Frame Slot Mode is enabled.
1: The Frame Slot Mode is disabled.
• DLM: Data Length Mode
0: The response data length is defined by the field DLC of this register.
1: The response data length is defined by the bits 4 and 5 of the Identifier (IDCHR in LINIR).
• CHKTYP: Checksum Type
0: LIN 2.0 “Enhanced” Checksum
1: LIN 1.3 “Classic” Checksum
• CHKDIS: Checksum Disable
0: In Master node configuration, the checksum is computed and sent automatically. In Slave node configuration, the checksum
is checked automatically.
1: Whatever the node configuration is, the checksum is not computed/sent and it is not checked.
• PARDIS: Parity Disable
0: In Master node configuration, the Identifier Parity is computed and sent automatically. In Master node and Slave node
configuration, the parity is checked automatically.
1:Whatever the node configuration is, the Identifier parity is not computed/sent and it is not checked.
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––––SYNCDIS PDCM
15 14 13 12 11 10 9 8
DLC
76543210
WKUPTYP FSDIS DLM CHKTYP CHKDIS PARDIS NACT