Datasheet

627
32117D–AVR-01/12
AT32UC3C
• RSTNACK: Reset Non Acknowledge
0: No effect
1: Resets NACK in CSR.
• RSTIT: Reset Iterations
0: No effect.
1: Resets ITERATION in CSR. No effect if the ISO7816 is not enabled.
• SENDA: Send Address
0: No effect.
1: In Multidrop Mode only, the next character written to the THR is sent with the address bit set.
• STTTO: Start Time-out
0: No effect.
1: Starts waiting for a character before clocking the time-out counter. Resets the status bit TIMEOUT in CSR.
• STPBRK: Stop Break
0: No effect.
1: Stops transmission of the break after a minimum of one character length and transmits a high level during 12-bit periods. No
effect if no break is being transmitted.
• STTBRK: Start Break
0: No effect.
1: Starts transmission of a break after the characters present in THR and the Transmit Shift Register have been transmitted. No
effect if a break is already being transmitted.
• RSTSTA: Reset Status Bits
0: No effect.
1: Resets the status bits PARE, FRAME, OVRE, MANERR, LINBE, LINSFE, LINIPE, LINCE, LINSNRE and RXBRK in CSR.
• TXDIS: Transmitter Disable
0: No effect.
1: Disables the transmitter.
• TXEN: Transmitter Enable
0: No effect.
1: Enables the transmitter if TXDIS is 0.
• RXDIS: Receiver Disable
0: No effect.
1: Disables the receiver.
• RXEN: Receiver Enable
0: No effect.
1: Enables the receiver, if RXDIS is 0.
• RSTTX: Reset Transmitter
0: No effect.
1: Resets the transmitter.
• RSTRX: Reset Receiver
0: No effect.
1: Resets the receiver.