Datasheet

564
32117D–AVR-01/12
AT32UC3C
25.3 Block Diagram
Figure 25-1. USART Block Diagram
Peripheral DMA
Controller
Channel Channel
INTC
Power
Manager
DIV
Receiver
Transmitter
Modem
Signals
Control
User
Interface
I/O
Controller
RXD
RTS
TXD
CTS
DTR
DSR
DCD
RI
CLK
BaudRate
Generator
USART
Interrupt
CLK_USART
CLK_USART/DIV
USART
Peripheral bus
Table 25-1. SPI Operating Mode
PIN USART SPI Slave SPI Master
RXD RXD MOSI MISO
TXD TXD MISO MOSI
RTS RTS CS
CTS CTS CS