Datasheet

503
32117D–AVR-01/12
AT32UC3C
24.6 Programming Interface
24.6.1 Configuration
Initialization of the MACB configuration (e.g. frequency ratios) must be done while the transmit
and receive circuits are disabled. Network control register and network configuration register are
described below.
24.6.2 Receive Buffer List
Receive data is written to areas of data (i.e., buffers) in system memory. These buffers are listed
in another data structure that also resides in main memory. This data structure (receive buffer
queue) is a sequence of descriptor entries as defined in ”Receive Buffer Descriptor Entry” on
page 491. It points to this data structure.
Figure 24-2. Receive Buffer List
To create the list of buffers:
1. Allocate a number (n) of buffers of 128 bytes in system memory.
2. Allocate an area 2n words for the receive buffer descriptor entry in system memory and
create n entries in this list. Mark all entries in this list as owned by MACB, i.e., bit 0 of
word 0 set to 0.
3. If less than 1024 buffers are defined, the last descriptor must be marked with the wrap
bit (bit 1 in word 0 set to 1).
4. Write address of receive buffer descriptor entry to MACB register receive buffer queue
pointer.
5. The receive circuits can then be enabled by writing to the address recognition registers
and then to the network control register.
Receive Buffer Queue Pointer
(MAC Register)
Receive Buffer 0
Receive Buffer 1
Receive Buffer
Description List
(In Memory)
(In Memory)
Receive Buffer N