Datasheet

464
32117D–AVR-01/12
AT32UC3C
Note: 1. The reset values for these registers are device specific. Please refer to the Module Configuration section at the end of this
chapter.
0x0B0 Interrupt Mode Register 1 Read/Write IMR1 Read/Write -
(1)
N N
0x0B4 Interrupt Mode Register 1 Set IMR1S Write-only N N
0x0B8 Interrupt Mode Register 1 Clear IMR1C Write-only N N
0x0BC Interrupt Mode Register 1 Toggle IMR1T Write-only N N
0x0C0 Glitch Filter Enable Register Read/Write GFER Read/Write -
(1)
NN
0x0C4 Glitch Filter Enable Register Set GFERS Write-only N N
0x0C8 Glitch Filter Enable Register Clear GFERC Write-only N N
0x0CC Glitch Filter Enable Register Toggle GFERT Write-only N N
0x0D0 Interrupt Flag Register Read IFR Read-only -
(1)
N N
0x0D4 Interrupt Flag Register - - - N N
0x0D8 Interrupt Flag Register Clear IFRC Write-only N N
0x0DC Interrupt Flag Register - - - N N
0x100 Output Driving Capability Register 0 Read/Write ODCR0 Read/Write -
(1)
YN
0x104 Output Driving Capability Register 0 Set ODCR0S Write-only Y N
0x108 Output Driving Capability Register 0 Clear ODCR0C Write-only Y N
0x10C Output Driving Capability Register 0 Toggle ODCR0T Write-only Y N
0x110 Output Driving Capability Register 1 Read ODCR1 Read/Write -
(1)
Y N
0x114 Output Driving Capability Register 1 Set ODCR1S Write-only Y N
0x118 Output Driving Capability Register 1 Clear ODCR1C Write-only Y N
0x11C Output Driving Capability Register 1 Toggle ODCR1T Write-only Y N
0x1A0 Lock Register Read/Write LOCK Read/Write -
(1)
N Y
0x1A4 Lock Register Set LOCKS Write-only N N
0x1A8 Lock Register Clear LOCKC Write-only N Y
0x1AC Lock Register Toggle LOCKT Write-only N Y
0x1E0 Unlock Register Read/Write UNLOCK Write-only N N
0x1E4 Access Status Register Read/Write ASR Read/Write N
0x1F8 Parameter Register Read PA RAM ETE R Read-only -
(1)
N N
0x1FC Version Register Read VERSION Read-only -
(1)
N N
Table 23-2. GPIO Register Memory Map
Offset Register Function Register Name Access Reset
Config.
Protection
Access
Protection